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FuriosaAI designs high-performance, power-efficient AI accelerators (NPUs) used in data centers for computer vision, GenAI, LLMs, and demanding workloads.

About FuriosaAI

FuriosaAI builds high-performance, high-efficiency AI compute for the Inference Era. Founded in 2017 by veteran semiconductor and AI algorithm engineers, Furiosa operates globally with offices in Korea and Silicon Valley, along with a compiler-focused R&D lab in Lisbon. 

Our vision is to make AI computing sustainable, enabling access to powerful AI for everyone on Earth. We solve the AI hardware energy and operational cost crisis at the architectural level, rather than through brute force, building the world's first truly AI-native compute platform to unlock the full potential of artificial intelligence  for every enterprise.

About the Role

Join our Power, Performance, and Thermal (PPT) Engineering team to optimize the next generation of AI accelerators. In this role, you will drive hardware and system-level innovations that maximize performance while minimizing power consumption and thermal impact. You will work closely with architecture, design, and software teams to develop high-performance, power-efficient NPU solutions from concept to production.

Who We’re Looking For

We welcome engineers at all experience levels-from early-career professionals to experienced technical leaders-who are passionate about building and optimizing world-class NPU architectures and solving complex power, performance, and thermal challenges.

Key Responsibilities

  • You will develop core system software to control power, performance, and thermals in an Linux environment for NPU SoCs.

  • DVFS & Power Management: Design and develop dynamic voltage and frequency scaling policies and drivers utilizing cpufreq, devfreq, and SCMI under Embedded Linux.

  • Core Subsystem Driver Development: Build and optimize drivers for CCF (Common Clock Framework), Regulators, and Thermal Management.

  • Power/Performance Profiling: Analyze power consumption and thermal trends during NPU execution to construct and validate optimal OPP (Operating Performance Point) tables.

Minimum Qualifications

  • Strong proficiency in C/C++ and AArch64 assembly.

  • Hands-on experience in Linux Kernel and Device Driver development.

  • Deep understanding of SoC architecture, including clock trees and power management mechanisms.

Preferred Qualifications

  • Experience in Chip/Board Bring-up and firmware development for mobile SoCs, NPUs, or GPUs.

  • Experience with JTAG in any aspect of debugging.

  • Experience with, or a strong interest in, Rust for system programming.

  • A proactive problem-solver who enjoys optimizing at the intersection of hardware and software.

Work Location & Flexibility

  • Location: Choose between our Seoul (Sinsa) office or Gyeonggi-do (Dongtan, Hwaseong) office.

  • Hybrid Work: Highly flexible remote/work-from-home policy to ensure you can focus and deliver your best work in an autonomous environment.

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