{"id":1403825,"url":"https://alion.io/job/general-dynamics-mission-systems-advanced-asic-fpga-engineer","title":"Advanced ASIC FPGA Engineer","company":{"id":1836162,"name":"General Dynamics Mission Systems","domain":"gdmissionsystems.com","url":"https://alion.io/company/gdmissionsystems-com","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"iCIMS","truth_index":{"grade":"A","score":100,"open_postings":3,"ghost_share":0,"stale_share":0,"repost_share":0,"time_to_fill_p50_days":9,"computed_at":"2026-10-24T06:02:35Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Pittsfield, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":128854,"max":142947,"currency":"USD","period":"year","gross":null,"usd_annual":142947},"salary_estimate":null,"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"JTAG Debuggers","optional":false},{"name":"Microsoft Office","optional":false},{"name":"VHDL","optional":false},{"name":"Xilinx Vivado","optional":false}],"status":"live","first_seen_at":"2026-09-28T16:58:28Z","employer_posted_date":"2026-09-28","last_verified_at":"2026-10-24T10:55:00Z","board_verified":true,"closed_at":null,"days_open":25,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":25},"description":"Basic Qualifications\nBachelor’s degree in Electrical or Computer Engineering, or a related Science, Engineering, Technology or Mathematics field. Also requires 5+ years of job-related experience, or a Master's degree plus 3 years of job-related experience.\nCLEARANCE REQUIREMENTS:: Department of Defense Secret security clearance is obtainable within a reasonable amount of time after hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.\nResponsibilities for this Position\nGeneral Dynamics Mission Systems is seeking a Proficient/Experienced ASIC/FPGA Design Engineer to lead digital design efforts using VHDL on an interim FPGA platform, transitioning designs to full ASIC implementation in collaboration with a packaging team. This role sits within a close-knit team of 5-6 engineers with a key focus on mentoring others through the conversion process. This position is on-site with up to 10% travel to customer sites.\nDuties and Tasks\nResponsible for definition, design, verification and documentation for ASIC and/or FPGA developments\nDetermines architecture, system simulation and detailed design approach with emphasis on VHDL-based digital design\nDefines module interfaces and all aspects of device design and simulation\nEvaluates the process flow including but not limited to high level design, synthesis, place and route, timing and power utilization\nCreates test and simulation plans that establish functional criteria\nVerifies test results and analyzes performance\nReviews vendor capabilities, foundry technologies, device libraries and simulation tools\nParticipates in the improvement of ASIC/FPGA organizational processes\nSupports the generation of technical engineering products by using the appropriate standards, processes, procedures, and tools throughout the ASIC/FPGA development life cycle\nContributes to the research and analysis of data, such as customer design proposal specifications and manuals to determine feasibility of design or application\nSelects components and equipment based on analysis of specifications and reliability\nConducts hardware integration and testing using lab equipment including oscilloscopes, logic analyzers, and JTAG debuggers\nCollaborates with ASIC packaging team to execute FPGA-to-ASIC conversion\nMentors and guides engineers through the FPGA-to-ASIC conversion methodology and best practices\nContributes to the completion of major programs and projects\nSupports program execution with awareness of project scope, schedule and cost objectives\nPlans and executes project tasks for activities described above\nKnowledge, Skills and Abilities\nFully proficient understanding of ASIC/FPGA engineering concepts, principles, and theories\nFully proficient in the principles and techniques of ASIC/FPGA design including FPGA-to-ASIC conversion\nStrong proficiency in VHDL for digital design and simulation\nHands-on experience with Microsemi and/or Xilinx FPGA platforms\nFully proficient with Vivado, Libero, Mentor, and/or Cadence EDA tools\nHardware integration experience with lab tools (oscilloscopes, logic analyzers, JTAG debuggers)\nFully proficient knowledge of other related disciplines including PCB/circuit board design\nAbility to mentor others through complex technical processes\nKeeps abreast of technology trends in ASIC/FPGA and semiconductor design\nGrasps and applies new information quickly\nFully proficient written and verbal communication skills\nAbility to recognize and clearly report information relevant to sound ASIC/FPGA design\nFully proficient in Microsoft Office applications\nAbility to think creatively and multi-task effectively\nFully proficient skill in communicating issues, impacts, and corrective actions\nWorking knowledge of earned value concepts and Cost Account Management (CAM) as they relate to program execution\nFrequent contact with project leaders, internal work groups, external customers, and vendors\nIdentifies opportunities to apply AI for continuous improvement and innovation\nRequired Qualifications\nStrong proficiency in VHDL for digital design and simulation\nHands-on experience with Microsemi and/or Xilinx FPGA development\nProficiency with Vivado, Libero, Mentor, and/or Cadence EDA tools\nHardware integration experience with lab tools (oscilloscopes, logic analyzers, JTAG debuggers)\nAbility to mentor others through technical processes\nAbility to obtain a DoD Security Clearance within 18 months\nBachelor's degree in Electrical or Computer Engineering, or related Science, Engineering or Mathematics field plus a minimum of 5 years relevant experience; or Master's degree plus a minimum of 3 years relevant experience\nPreferred Qualifications\nActive DoD Security Clearance\nASIC design or tape-out experience\nPCB/circuit board design background\nFPGA-to-ASIC conversion experience\nExperience with project cost and schedule awareness in a program environment\nSalary Note\nThis estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled.Combined Salary Range\nUSD $128,854.00 - USD $142,947.00 /Yr.Company Overview\nGeneral Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team!\nEqual Opportunity Employer / Individuals with Disabilities / Protected Veterans","description_format":"text","description_chars":6216,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":true},"security_clearance":true,"languages":[]},"benefits":["Flexible schedule"],"hiring_locations":[{"name":"United States","iso":"US","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Military","National Security","Defense Manufacturing"],"lifecycle":[{"event":"open","at":"2026-09-28T16:58:28Z"}],"visa":[],"liveness":{"score":20,"band":"cold","label":"Long shot","p_open":1,"p_active":0.569,"p_room":0.35,"age_days":25,"expected_fill_days":9,"reasons":["conf:3","velocity","win:tail","comp:brand"],"computed_at":"2026-10-24T06:02:35Z"},"pay":{"stated_usd_annual":142947,"is_top_pay":false},"html_url":"https://alion.io/job/general-dynamics-mission-systems-advanced-asic-fpga-engineer","json_url":"https://alion.io/job/general-dynamics-mission-systems-advanced-asic-fpga-engineer.json","meta":{"generated_at":"2026-10-24T13:53:01Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":20005,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-25T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":1836162},"rest":"https://alion.io/mcp/rest/get_company?id=1836162"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fgeneral-dynamics-mission-systems-advanced-asic-fpga-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fgeneral-dynamics-mission-systems-advanced-asic-fpga-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fgeneral-dynamics-mission-systems-advanced-asic-fpga-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/general-dynamics-mission-systems-advanced-asic-fpga-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fgeneral-dynamics-mission-systems-advanced-asic-fpga-engineer"}]}