{"id":3490520,"url":"https://alion.io/job/globalfoundries-dft-engineer-2","title":"DFT Engineer","company":{"id":3730,"name":"GlobalFoundries","domain":"gf.com","url":"https://alion.io/company/globalfoundries","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":75,"open_postings":218,"ghost_share":0,"stale_share":0.982,"repost_share":0,"time_to_fill_p50_days":30,"computed_at":"2026-11-03T05:54:40Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"middle","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":4,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Perl","optional":false},{"name":"Python","optional":false}],"status":"live","first_seen_at":"2026-10-28T00:00:00Z","employer_posted_date":"2026-10-28","last_verified_at":"2026-11-03T12:31:04Z","board_verified":true,"closed_at":null,"days_open":6,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":6},"description":"The DFT Engineer delivers hands-on expertise in designing and deploying advanced Design-for-Test solutions for semiconductor chip development. This role drives robust DFT architectures-including ATPG, MBIST, LBIST, and analog test solutions-while implementing optimized methodologies for rapid test pattern generation and efficient project delivery.Your Job\nImplement DFT architectures including ATPG, MBIST, LBIST, scan insertion, and analog test features under manager guidance.\n\nExecute test pattern generation and optimization to minimize test time while maximizing coverage and manufacturing yield.\n\nApply standardized DFT methodologies and flows to deliver efficient, repeatable results across multiple projects.\n\nIntegrate DFT requirements into RTL and physical design stages through collaboration with design, verification, and backend teams.\n\nDevelop automation scripts (TCL, Python, Perl) for test pattern creation, validation, and analysis.\n\nAnalyze test data from silicon bring-up and production toidentifyimprovements and support root-cause debugging.\n\nDocument DFT implementations, test results, and reuse IP for team knowledge sharing.\n\nOther Responsibilities\nPerform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Securityrequirementsand programs.\n\nRequired Qualifications\nBachelor’s orMaster’s degree in Electrical Engineering, Computer Engineering, ora relatedfield.\n\n4+ years of hands-on DFT experience on SoCs, including ATPG, MBIST, LBIST, and scan-based testing.\n\nProficiencywith EDA tools such as SynopsysTestMAX, Cadence Modus, or MentorTessentfor DFT insertion and pattern generation.\n\nExperience with scripting languages (Python, Perl, TCL) for flow automation and data analysis.\n\nFamiliarity with optimizing test time, fault coverage, and ATPG patterns.\n\nStrong analytical skills and attention to detail for debugging complex test failures.\n\nEffective communication skills for cross-functional collaboration.\n\nPreferred Qualifications\nExperience with automotive ASIL flows or high-volume manufacturing test challenges.\n\nProactive contributor to process improvements and tool evaluations.\n\nInformation about our benefits you can find here: https://gf.com/about-us/careers/opportunities-asia","description_format":"text","description_chars":2265,"description_truncated":false,"requirements":{"experience_years_min":4,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Semiconductor Manufacturing"],"lifecycle":[{"event":"open","at":"2026-10-29T23:23:38Z"}],"visa":[],"liveness":{"score":63,"band":"ok","label":"Likely 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