{"id":2880090,"url":"https://alion.io/job/globalfoundries-dft-engineer-testchip-architecture-rtl-dft","title":"DFT Engineer ( Testchip Architecture/ RTL DFT)","company":{"id":3730,"name":"GlobalFoundries","domain":"gf.com","url":"https://alion.io/company/globalfoundries","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":75,"open_postings":188,"ghost_share":0,"stale_share":0.984,"repost_share":0,"time_to_fill_p50_days":31,"computed_at":"2026-10-23T05:54:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":18000,"max_usd":46000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":18},"experience_years_min":7,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Tessent","optional":true}],"status":"live","first_seen_at":"2026-03-25T00:00:00Z","employer_posted_date":"2026-03-25","last_verified_at":"2026-10-23T21:43:25Z","board_verified":true,"closed_at":null,"days_open":212,"trust":{"level":"stale","repost_count":0,"flags":["stale"],"days_open":212},"description":"AboutGlobalFoundries\nGlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.\nJob Overview:\nWe are seeking a skilled DFT Engineer to lead DFT architecture and methodology development for complex test-chip designs. The role involves defining and implementing Scan, MBIST, ATPG, and supporting post-silicon debug activities. The engineer will collaborate with design, verification, and physical design teams to ensure seamless BIST integration and validation. Strong hands-on experience in JTAG, Memory BIST, ATPG, SystemVerilog, and UVM is essential, along with proficiency in simulation, testbench development, and ATE pattern handling. Expertise in scripting with Tcl, Python, and Shell is required. Experience in RTL development and functional verification is a plus\nEssential Responsibilities:\nLead the DFT architecture for test-chip designs. \nDevelop and maintain DFT methodologies for the team. \nPossess strong knowledge of MBIST, at-speed testing, test-clocking, and port-mixing. \nOwn and deliver test architectures including Scan, Mem-BIST, ATPG, and provide post-silicon support. \nCollaborate effectively with cross-functional design, verification, and physical design teams to ensure seamless BIST integration and validation\nRequired Qualifications:\nBSEE/MSEE or PhD in Electrical Engineering with 7+ years of strong hands-on experience in JTAG, Scan, Memory BIST, and ATPG\nProficient in SystemVerilog and UVM-based verification environments.\nExpertise with ATPG and MBIST tools, particularly Tessent (mandatory).\nStrong proficiency in testbench development, simulation, and debug.\nExperience in post-silicon failure analysis, diagnostics, and debug.\nAbility to work with ATE patterns and perform gate-level simulations.\nSkilled in scripting and automation using Tcl, Python, and Shell.\nExperience in RTL development and functional verification of logic circuits is an added advantage.\nPreferred Qualifications:\nExperience in RTL development and functional verification of logic circuits.\nStrong communication skills and ability to work in cross-functional teams.\n\"GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard.\nAs an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities.\nAll offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations.\"\nInformation about our benefits you can find here: https://gf.com/about-us/careers/opportunities-asia","description_format":"text","description_chars":3269,"description_truncated":false,"requirements":{"experience_years_min":7,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"phd","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Semiconductor Manufacturing"],"lifecycle":[{"event":"open","at":"2026-10-19T22:33:36Z"}],"visa":[],"liveness":{"score":7,"band":"cold","label":"Long shot","p_open":1,"p_active":0.245,"p_room":0.28,"age_days":212,"expected_fill_days":31,"reasons":["conf:0","stale_co","velocity","win:tail","crowd:brand"],"computed_at":"2026-10-23T05:54:15Z"},"pay":null,"html_url":"https://alion.io/job/globalfoundries-dft-engineer-testchip-architecture-rtl-dft","json_url":"https://alion.io/job/globalfoundries-dft-engineer-testchip-architecture-rtl-dft.json","meta":{"generated_at":"2026-10-23T22:36:47Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":5468,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-24T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":3730},"rest":"https://alion.io/mcp/rest/get_company?id=3730"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fglobalfoundries-dft-engineer-testchip-architecture-rtl-dft"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fglobalfoundries-dft-engineer-testchip-architecture-rtl-dft"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fglobalfoundries-dft-engineer-testchip-architecture-rtl-dft"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/globalfoundries-dft-engineer-testchip-architecture-rtl-dft\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fglobalfoundries-dft-engineer-testchip-architecture-rtl-dft"}]}