{"id":3583392,"url":"https://alion.io/job/globalfoundries-pmts-pex-engineer-quantum","title":"PMTS, PEX Engineer - Quantum","company":{"id":3730,"name":"GlobalFoundries","domain":"gf.com","url":"https://alion.io/company/globalfoundries","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":75,"open_postings":214,"ghost_share":0,"stale_share":0.981,"repost_share":0,"time_to_fill_p50_days":30,"computed_at":"2026-11-01T06:10:25Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":143000,"max":247000,"currency":"USD","period":"year","gross":null,"usd_annual":247000},"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Anomaly Detection","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"Cadence Pegasus","optional":true},{"name":"Photolithography","optional":true},{"name":"Siemens Calibre","optional":true},{"name":"Synopsys IC Validator","optional":true}],"status":"live","first_seen_at":"2026-10-30T00:00:00Z","employer_posted_date":"2026-10-30","last_verified_at":"2026-11-01T11:12:02Z","board_verified":true,"closed_at":null,"days_open":2,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":2},"description":"About GlobalFoundries:\nGlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.\nSummary of Role\nThe Design Enablement Engineer, DRC/LVS/PEX is responsible for developing, qualifying, and deploying physical verification and parasitic extraction components for semiconductor Process Design Kits (PDKs). The role translates complex process and design requirements into accurate, robust, and efficient DRC, LVS, and PEX rule decks and verification flows, while advancing automation and AI/ML-assisted methodologies to improve PDK quality, development efficiency, and customer design success.\nThe Design Enablement Engineer develops and deploys critical PDK components that accurately represent semiconductor manufacturing processes within customer design and verification environments. The engineer will work at the intersection of process technology, design rules, device modeling, EDA, circuit design, and physical design to create differentiated physical verification and extraction solutions that enable first-time-right product designs.\nThe role will have particular responsibility for Design Rule Checking (DRC), Layout Versus Schematic (LVS), and Parasitic Extraction (PEX) rule development, validation, release, and continuous improvement. The engineer will also develop advanced automation and explore AI/ML-based approaches for rule generation, test-case creation, coverage analysis, debugging, anomaly detection, and verification-flow optimization.\nEssential Responsibilities\nDevelop, code, qualify, and maintain DRC, LVS, and PEX rule decks and associated PDK components that accurately represent semiconductor process, device, interconnect, and design requirements.\nTranslate process integration requirements, design rules, device definitions, and electrical models into production-quality physical verification and extraction solutions for customer and internal design flows.\nDevelop comprehensive regression and test methodologies to validate rule-deck correctness, coverage, performance, scalability, and compatibility across supported technology and EDA environments.\nAnalyze and debug complex DRC, LVS, and PEX issues, identify root causes, and work with process, modeling, design, and EDA teams to resolve discrepancies between process intent and design-flow implementation.\nPartner with process technology, design rule, compact modeling, reliability, circuit design, layout, and EDA teams to ensure accurate representation of semiconductor technologies throughout the design-to-manufacturing flow.\nDevelop differentiated automation and AI/ML-assisted methodologies for rule-deck development, automated test generation, coverage assessment, error classification, anomaly detection, debugging, and continuous verification of PDK quality.\nOptimize physical verification and extraction flows for accuracy, runtime, memory usage, scalability, usability, and deployment into production design environments.\nDrive PDK quality and release readiness through structured qualification, regression testing, documentation, change management, and continuous improvement based on internal and customer design feedback.\nOther Responsibilities\nPerform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.\nWork and collaborate on other projects and/or assignments as needed.\nRequired Qualifications\nEducation: Bachelor's degree in Electrical Engineering, Computer Engineering, Microelectronics, Computer Science, Applied Physics, or a related technical field.\nExperience: Relevant experience in semiconductor PDK development, physical verification, EDA, IC physical design, parasitic extraction, or a related field, with minimum years aligned to the applicable GF career level.\nPhysical Verification: Experience with DRC and/or LVS rule development, coding, debug, or qualification.\nPEX: Understanding of parasitic resistance and capacitance extraction, interconnect modeling, layout-dependent effects, and their impact on circuit performance.\nSemiconductor Technology: Working knowledge of CMOS process technologies, semiconductor devices, layout design rules, interconnect structures, and design-to-manufacturing interactions.\nEDA: Experience with industry-standard physical verification and/or extraction environments and rule-deck development methodologies.\nProgramming/Automation: Experience with scripting or programming languages such as Python, Tcl, Perl, shell scripting, or equivalent for engineering automation, regression testing, and data analysis.\nAnalytical Skills: Demonstrated ability to troubleshoot complex technical problems, perform structured root-cause analysis, and translate findings into robust engineering solutions.\nTravel: Up to 10%.\nFluency in English Language: Written and verbal.\nPreferred Qualifications\nMaster's degree or PhD in Electrical Engineering, Computer Engineering, Microelectronics, Applied Physics, Computer Science, or a related field.\nExperience developing and releasing production PDK DRC, LVS, and/or PEX rule decks for semiconductor technologies.\nExperience with physical verification environments such as Siemens Calibre, Synopsys IC Validator, Cadence Pegasus/PVS, or equivalent tools.\nExperience with PEX technology-file development, RC extraction, process-corner modeling, and silicon/model correlation.\nExperience developing automated regression environments, rule coverage metrics, test structures, or PDK qualification methodologies.\nExperience applying AI/ML, generative AI, or data-driven techniques to semiconductor design enablement, such as automated rule coding, test-pattern generation, verification debug, error classification, or PDK quality analysis.\nUnderstanding of interactions among process integration, design rules, OPC/lithography, device modeling, reliability, extraction, and circuit design.\nExperience collaborating directly with EDA vendors and internal or external design teams to develop and deploy differentiated design enablement capabilities.\nStrong written and verbal communication skills.\nStrong planning and organizational skills.\nExpected Salary Range\n$143,000.00 - $247,000.00The exact Salary will be determined based on qualifications, experience and location.\nIf you need a reasonable accommodation for any part of the employment process, please contact us by email at  let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.\nAn offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.\nGlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory.\nAll policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law","description_format":"text","description_chars":8137,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[{"language":"English","level":"Advanced (C1)","optional":false}]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Semiconductor Manufacturing"],"lifecycle":[{"event":"open","at":"2026-11-01T06:28:55Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 100 · green card filings: 45","filings_12m":100,"filings_prev_12m":95,"green_card_filings_12m":45,"median_offered_wage_usd":110948,"route":null,"cap_exempt":false,"checked_at":"2026-10-29T16:27:21+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":16}],"liveness":{"score":86,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.86,"p_room":1,"age_days":2,"expected_fill_days":30,"reasons":["conf:3","win:early","comp:brand"],"computed_at":"2026-11-01T15:08:19Z"},"pay":{"stated_usd_annual":247000,"is_top_pay":true},"html_url":"https://alion.io/job/globalfoundries-pmts-pex-engineer-quantum","json_url":"https://alion.io/job/globalfoundries-pmts-pex-engineer-quantum.json","meta":{"generated_at":"2026-11-01T15:08:19Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":23200,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-02T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":3730},"rest":"https://alion.io/mcp/rest/get_company?id=3730"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fglobalfoundries-pmts-pex-engineer-quantum"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fglobalfoundries-pmts-pex-engineer-quantum"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fglobalfoundries-pmts-pex-engineer-quantum"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/globalfoundries-pmts-pex-engineer-quantum\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fglobalfoundries-pmts-pex-engineer-quantum"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3583392}},{"tool":"search_jobs","arguments":{"company":"gf.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3583392},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. Docs: https://alion.io/developers"}}