{"id":1669284,"url":"https://alion.io/job/globalfoundries-staff-engineer-cpu-ip-design-engineer","title":"Staff Engineer CPU IP Design Engineer","company":{"id":3730,"name":"GlobalFoundries","domain":"gf.com","url":"https://alion.io/company/globalfoundries","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":80,"open_postings":5,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":17,"computed_at":"2026-10-15T05:46:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":29000,"max_usd":60000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":557},"experience_years_min":4,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Physical AI","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false},{"name":"Perl","optional":true},{"name":"Python","optional":true}],"status":"live","first_seen_at":"2026-09-06T00:00:00Z","employer_posted_date":"2026-09-06","last_verified_at":"2026-10-15T00:48:33Z","board_verified":true,"closed_at":null,"days_open":40,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":40},"description":"About MIPS @ GlobalFoundries:\nGlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies.\nWith the addition of the MIPS team, GF now offer a rich portfolio of RISC-V CPUs, especially AI-enabled processors for the Physical AI world.\nSummary of Role:\nWe are seeking an experienced CPU IP Design Engineer. Responsible for Defining, leading and owning RTL development of our latest AI-enabled RISC-V CPU core. The candidate will be responsible for all aspects of the design including Functional Features, Performance, Power, and Area.\nEssential Responsibilities:\nDrive the micro-architecture and design of critical blocks of the CPU core\nDesign of RISC-V Vector CPU core and its custom extensions\nDesign of AI-enabled Matrix engine to augment the Vector CPU\nExplore high-performance strategies working with the CPU modeling team\nPerform Microarchitecture development and specification- from early high-level architectural exploration, through microarchitectural research and arrive at detailed specifications\nConfigure Design Features Development, assessment, and refinement of RTL design to target power, performance, area, and timing goals\nPerform Functional verification support and assist in the design verification strategy\nAssist with the verification of RTL design performance goals\nPartner with a multi-functional engineering team to implement and validate physical design aspects of timing, area, reliability, testability, and power\nOther Responsibilities:\nPerform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs. \nRequired Qualifications:\nHands-on working knowledge of the pipeline stages of an in-order or out-of-order high-performance CPU core\nThorough knowledge of microprocessor architecture including expertise in one or more of the following areas:Instruction fetch and decode, branch prediction techniques\nInstruction scheduling, register renaming, Reorder Buffer (ROB)\nOut-of-order execution\nInteger and Floating-point execution\nLoad/Store execution\nInstruction and Data Prefetch\nVector data path\nCache and memory subsystems\n\nKnowledge of Cache coherency and memory consistency\nKnowledge of System Verilog, Verilog and/or VHDL\nExperience with simulators and waveform debugging tools.\nKnowledge of logic design principles along with timing and power implications\nMaster’s with 4-7 years of experience, PhD 2-5 years of work experience\nPreferred Qualifications:\nExperience with designing RISC-V, ARM, and/or MIPS CPU\nExperience with Hardware multi-threading, virtualization, and SIMD designs\nExperience with vector and matrix-enabled CPUs, preferably RISC-V processors.\nUnderstanding of high-performance techniques and trade-offs in a CPU microarchitecture\nUnderstanding of low-power microarchitecture techniques\nExperience using a scripting language such as Perl or Python\nUnderstanding of CPU integration at SoC level\nUnderstanding of Safety and Security microarchitecture\nGlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard.\nAs an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities.\nAll offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations.\nNo Recruitment Fee Policy: GlobalFoundries is committed to ethical and transparent hiring practices. Candidates will not be charged any fees at any stage of the recruitment process. Any request for payment related to a GlobalFoundries employment opportunity is unauthorized and should be reported immediately. All legitimate recruitment communications are conducted exclusively through official GlobalFoundries channels. To report concerns or suspected recruitment fraud, please contact our Ethics & Compliance Office at  or visit our official website.\nThe Ethics & Compliance mailbox is not a recruitment channel. CVs/resumes submitted to this mailbox will not be reviewed, processed, or considered for employment opportunities. Please apply through the official GlobalFoundries careers site only.\nInformation about our benefits you can find here: https://gf.com/about-us/careers/opportunities-asia","description_format":"text","description_chars":4753,"description_truncated":false,"requirements":{"experience_years_min":4,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"master","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Manufacturing","Electrical & Electronic Engineering","Semiconductor Manufacturing"],"lifecycle":[{"event":"open","at":"2026-10-02T06:19:43Z"}],"visa":[],"liveness":{"score":24,"band":"cold","label":"Long shot","p_open":1,"p_active":0.691,"p_room":0.35,"age_days":39,"expected_fill_days":17,"reasons":["conf:4","velocity","win:tail","comp:brand"],"computed_at":"2026-10-15T05:46:00Z"},"pay":null,"html_url":"https://alion.io/job/globalfoundries-staff-engineer-cpu-ip-design-engineer","json_url":"https://alion.io/job/globalfoundries-staff-engineer-cpu-ip-design-engineer.json","meta":{"generated_at":"2026-10-16T04:40:28Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":1639,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-17T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":3730},"rest":"https://alion.io/mcp/rest/get_company?id=3730"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fglobalfoundries-staff-engineer-cpu-ip-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fglobalfoundries-staff-engineer-cpu-ip-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fglobalfoundries-staff-engineer-cpu-ip-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/globalfoundries-staff-engineer-cpu-ip-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fglobalfoundries-staff-engineer-cpu-ip-design-engineer"}]}