{"id":2369365,"url":"https://alion.io/job/google-design-verification-engineer-silicon-engineering","title":"Design Verification Engineer, Silicon Engineering","company":{"id":82,"name":"Google","domain":"google.com","url":"https://alion.io/company/google","size_band":"11-50","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Career site","truth_index":{"grade":"B","score":75,"open_postings":103,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":30,"computed_at":"2026-10-12T06:55:09Z"}},"role":"Hardware","role_family":"Hardware","seniority":"middle","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":19500,"max_usd":45000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":712},"experience_years_min":4,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Formal Verification","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Computer Vision","optional":true},{"name":"Machine Learning","optional":true}],"status":"live","first_seen_at":"2026-10-12T12:10:57Z","employer_posted_date":"2026-10-12","last_verified_at":"2026-10-13T00:55:28Z","board_verified":true,"closed_at":null,"days_open":0,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":0},"description":"About the job\nBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.\nAs an ASIC Design Verification Engineer on the Silicon team, you will verify next-generation custom silicon accelerators and SoCs, build advanced Universal Verification Methodology (UVM) test environments, and collaborate across design, architecture, and emulation teams to deliver production-quality silicon.\nThe Platforms and Devices team encompasses Google's various computing software platforms across environments (desktop, mobile, applications), as well as our first party devices and services that combine the best of Google AI, software, and hardware. Teams across this area research, design, and develop new technologies to make our user's interaction with computing faster and more seamless, building innovative experiences for our users around the world.Responsibilities\nCreate and improve constrained-random verification environments using SystemVerilog and UVM. Use SystemVerilog Assertions (SVA) and formal tools for formal verification.\nPerform power-aware simulations and formal verification to validate power management features like clock gating, power gating, and Dynamic Voltage and Frequency Scaling (DVFS). Develop and implement power-aware test cases, including stress and corner-case scenarios, for robust power integrity.\nDevelop and execute coverage-driven verification plans to ensure comprehensive coverage of ASIC designs. Collaborate with design engineers to resolve coverage issues and improve design quality.\nPlan the verification of complex digital design blocks by understanding design specifications and collaborating with design engineers to identify key verification scenarios.\nQualifications\nMinimum qualifications:\nBachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.\n4 years of experience verifying digital logic at RTL using System Verilog for FPGAs and ASICs.\nExperience with UVM Testbenches/environments.\nPreferred qualifications:\nMaster's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.\nExpertise in creating/using verification components and environments in UVM methodology at IP or Subsystem level.\nExperience with image processing, computer vision or machine learning IPs.\nExperience with AMBA(APB/AXI/ACE) or other standard protocols.\nFamiliarity with CPU, GPU or other compute/ML architectures.\nExcellent communication and collaboration skills with the ability to work with cross-functional teams.","description_format":"text","description_chars":2885,"description_truncated":false,"requirements":{"experience_years_min":4,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":true},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Digital Media","Marketing Analytics & Attribution","Streaming & OTT Platforms","Consumer Internet Groups"],"lifecycle":[{"event":"open","at":"2026-10-12T17:12:39Z"}],"visa":[],"liveness":{"score":86,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.86,"p_room":1,"age_days":0,"expected_fill_days":30,"reasons":["conf:1","win:early","comp:brand"],"computed_at":"2026-10-13T02:19:06Z"},"pay":null,"html_url":"https://alion.io/job/google-design-verification-engineer-silicon-engineering","json_url":"https://alion.io/job/google-design-verification-engineer-silicon-engineering.json","meta":{"generated_at":"2026-10-13T02:19:06Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":3462,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-14T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":82},"rest":"https://alion.io/mcp/rest/get_company?id=82"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fgoogle-design-verification-engineer-silicon-engineering"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fgoogle-design-verification-engineer-silicon-engineering"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fgoogle-design-verification-engineer-silicon-engineering"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/google-design-verification-engineer-silicon-engineering\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fgoogle-design-verification-engineer-silicon-engineering"}]}