{"id":4068605,"url":"https://alion.io/job/google-packaging-mechanical-engineer-quantum-ai","title":"Packaging Mechanical Engineer, Quantum AI","company":{"id":82,"name":"Google","domain":"google.com","url":"https://alion.io/company/google","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Career site","truth_index":{"grade":"B","score":78,"open_postings":131,"ghost_share":0.038,"stale_share":0.763,"repost_share":0.038,"time_to_fill_p50_days":30,"computed_at":"2026-11-12T10:38:37Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Goleta, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"GD&T","optional":false},{"name":"SolidWorks","optional":false}],"status":"live","first_seen_at":"2026-11-11T09:40:27Z","employer_posted_date":"2026-11-11","last_verified_at":"2026-11-12T10:38:29Z","board_verified":true,"closed_at":null,"days_open":1,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":1},"description":"About the job\nGoogle Quantum AI is building quantum computing for otherwise unsolvable problems. The full potential of quantum computing will be unlocked with a computer capable of complex, error-corrected computations. Our roadmap is focused on advancing the capabilities of quantum computing and enabling meaningful applications.\nIn the device packaging group, we build custom packaging technologies for quantum processors, amplifiers, and other devices that operate from DC to microwave frequencies in a cryogenic environment. Our work includes research on quantum processor performance and qubit environment, design of novel packages and test articles, investigation of new technologies, and optimizing of current technologies for deployment. Every Google Quantum AI processor comes through our lab for packaging before its deployment to the fleet.\nAs a Packaging Mechanical Engineer, you will work with other hardware engineers to design, build, and test electronics packaging for our quantum processors and other adjacent cryogenic hardware. You will be a critical part of ensuring that our next generation of packaging matures quickly and efficiently by performing detailed design work, defining and verifying mechanical requirements, and ensuring industry standard design and manufacturing principles are being followed. This role is essential for Google Quantum AI to build scalable and reliable electronics for the next level of computing.\nIndividual pay is determined by factors including job-related skills, experience, and relevant education or training.US: $150000 - $217000 (USD) + 15% bonus target + equity + benefits\nLearn more about benefits at Google.\nResponsibilities\nCollaborate with adjacent teams to mature design, assembly, test, and managing workflows for new electronics packages and test setups.\nDefine mechanical requirements for quantum packages and other critical component and system interfaces.\nDrive detail designs to support research and development (R&D) and production electronics packaging.\nWrite and execute test plans to fully verify designs prior to deployment.\nOptimize prototype designs for production at scale.\nQualifications\nMinimum qualifications:\nBachelor's degree in Mechanical Engineering, Product Design, Electrical Engineering, a related field, or equivalent practical experience.\n5 years of experience in design and analysis of electro-mechanical systems.\n5 years of experience using computer-aided design tools (e.g., OnShape, NX, Creo, or Solidworks).\n5 years working on mechanical engineering and design principles in the areas of conventional and EDM machining, sheet metal forming, and structural analysis.\n5 years of working with GD&T and experience performing tolerance stack analyses.\n5 years of experience working with the implementation of Design for excellence (DfX) (e.g., Design for Manufacturing, Design for Testing, Design for Assembly) standards.\nPreferred qualifications:\nMaster's or PhD degree in Mechanical Engineering, Electrical Engineering, Computer Engineering, Physics, or a related field.\n1 year of experience in technical leadership.\nExperience designing parts for cryogenic environments.\nExperience performing coefficient of thermal expansion (CTE) analysis on hardware in cryogenic environments.\nExperience using high precision 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