{"id":3149869,"url":"https://alion.io/job/google-silicon-micro-architecture-and-rtl-lead-google-cloud","title":"Silicon Micro-Architecture and RTL Lead, Google Cloud","company":{"id":82,"name":"Google","domain":"google.com","url":"https://alion.io/company/google","size_band":"11-50","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Career site","truth_index":{"grade":"B","score":83,"open_postings":172,"ghost_share":0.041,"stale_share":0.57,"repost_share":0.041,"time_to_fill_p50_days":30,"computed_at":"2026-10-24T06:02:35Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":29000,"max_usd":67000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":741},"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"SystemVerilog","optional":false},{"name":"TPU","optional":false},{"name":"Verilog","optional":false},{"name":"C++","optional":true},{"name":"Perl","optional":true},{"name":"Python","optional":true}],"status":"live","first_seen_at":"2026-10-23T08:38:53Z","employer_posted_date":"2026-10-23","last_verified_at":"2026-10-24T05:26:32Z","board_verified":true,"closed_at":null,"days_open":1,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":1},"description":"About the job\nIn this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.\nIn this role, you will work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU technology that powers Google's most demanding AI/ML applications. You will be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You will contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.\nBehind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.Responsibilities\nDrive development of Complex IPs and Subsystems along with a team of engineers in the Bangalore design organization. \nOwn microarchitecture and implementation of IPs and subsystems.\nWork with Architecture, Firmware (FW) and Software (SW) teams to drive feature closure and develop microarchitecture specifications.\nDrive design methodology, libraries, debug, code review in coordination with other IPs Design Verification (DV) teams and physical design teams.\nIdentify and drive Power, Performance and Area improvements for the domains owned.\nQualifications\nMinimum qualifications:\nBachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.\n10 years of experience in Application-Specific Integrated Circuit/System on a chip (ASIC/SoC) development with Verilog/SystemVerilog.\nExperience in micro-architecture and design of IPs and Subsystems.\nExperience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT).\nPreferred qualifications:\nExperience with programming languages (e.g., Python, C/C++ or Perl).\n\nExperience in SoC designs and integration flows.\nKnowledge of arithmetic units, processor design, accelerators, bus architectures, fabrics/NoC or memory hierarchies.\nKnowledge of high performance and low power design techniques.","description_format":"text","description_chars":3069,"description_truncated":false,"requirements":{"experience_years_min":10,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Digital Media","Marketing Analytics & Attribution","Streaming & OTT Platforms","Consumer Internet Groups"],"lifecycle":[{"event":"open","at":"2026-10-23T11:43:05Z"}],"visa":[],"liveness":{"score":63,"band":"ok","label":"Likely open","p_open":1,"p_active":0.632,"p_room":1,"age_days":0,"expected_fill_days":30,"reasons":["conf:0","stale_co","velocity","win:early","comp:brand"],"computed_at":"2026-10-24T06:02:35Z"},"pay":null,"html_url":"https://alion.io/job/google-silicon-micro-architecture-and-rtl-lead-google-cloud","json_url":"https://alion.io/job/google-silicon-micro-architecture-and-rtl-lead-google-cloud.json","meta":{"generated_at":"2026-10-24T13:49:41Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":19919,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-25T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":82},"rest":"https://alion.io/mcp/rest/get_company?id=82"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fgoogle-silicon-micro-architecture-and-rtl-lead-google-cloud"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fgoogle-silicon-micro-architecture-and-rtl-lead-google-cloud"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fgoogle-silicon-micro-architecture-and-rtl-lead-google-cloud"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/google-silicon-micro-architecture-and-rtl-lead-google-cloud\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fgoogle-silicon-micro-architecture-and-rtl-lead-google-cloud"}]}