{"id":2071611,"url":"https://alion.io/job/google-silicon-soc-design-verification-engineer-hsio","title":"Silicon SoC Design Verification Engineer, HSIO","company":{"id":82,"name":"Google","domain":"google.com","url":"https://alion.io/company/google","size_band":"11-50","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Career site","truth_index":{"grade":"B","score":75,"open_postings":114,"ghost_share":0,"stale_share":0.982,"repost_share":0,"time_to_fill_p50_days":30,"computed_at":"2026-10-13T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":20000,"max_usd":50000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":13},"experience_years_min":8,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Perl","optional":true},{"name":"Python","optional":true}],"status":"live","first_seen_at":"2026-10-08T04:36:56Z","employer_posted_date":"2026-10-08","last_verified_at":"2026-10-13T22:55:08Z","board_verified":true,"closed_at":null,"days_open":5,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":5},"description":"About the job\nBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.\nAs a High-Speed Input/Output (HSIO) Physical Layer (PHY) Verification Lead at Google, you will play a critical role in the development of our next-generation custom silicon. You will lead the verification strategy and execution for high-speed interfaces, ensuring seamless integration and flawless performance at both the sub-system and SoC levels. You will collaborate closely with global, cross-functional teams spanning design, architecture, and post-silicon validation to drive our custom hardware from concept to successful silicon bring-up.\nGoogle's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.\nResponsibilities\nLead HSIO PHY integration verification at both the Sub-system and SoC levels.\nDrive SoC-level test case development and successfully port HSIO PHY IP-level test cases to the SoC environment.\nExecute and oversee regressions in RTL, Gate-Level Simulations (GLS), and Timing simulations and perform HSIO PHY virtual tester (VT) simulations across RTL, GLS, and Timing environments.\nOwn testbench bring-up, including the integration of third-party Verification IP (VIP).Generate EVCD and bench collaterals for target test cases to support downstream validation.\nPerform deep waveform debugging and troubleshoot complex digital design and verification issues.\nQualifications\nMinimum qualifications:\nBachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field, or equivalent practical experience\n8 years of experience in verification methodologies such as C, SystemVerilog and Open Verification Methodology/Universal Verification Methodology (OVM/UVM)-based constrained random verification.\nExperience of high-speed protocols including USB2/USB3, PCIe, UFS, MIPI, and in loopback test concepts.\nExperience with HSIO PHY Controllers and PHY+ controller test case porting.\nPreferred qualifications:\nMaster's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.\nStrong understanding of SoC-level interfaces and the configurability of HSIO PHY registers.\nExperience leading verification modules or mentoring junior engineers in a complex SoC environment.\nExperience in scripting languages such as Python, Perl, SKILL, Tcl, or equivalent to build and automate verification flows.\nTrack record of successfully taking complex mixed-signal/HSIO IP from the pre-silicon verification phase through to post-silicon validation.","description_format":"text","description_chars":3134,"description_truncated":false,"requirements":{"experience_years_min":8,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":true},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Incident Response","Streaming & OTT Platforms","Foundation Models","Consumer Internet Groups"],"lifecycle":[{"event":"open","at":"2026-10-08T07:14:07Z"}],"visa":[],"liveness":{"score":63,"band":"ok","label":"Likely open","p_open":1,"p_active":0.632,"p_room":1,"age_days":5,"expected_fill_days":30,"reasons":["conf:1","stale_co","velocity","win:early","comp:brand"],"computed_at":"2026-10-13T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/google-silicon-soc-design-verification-engineer-hsio","json_url":"https://alion.io/job/google-silicon-soc-design-verification-engineer-hsio.json","meta":{"generated_at":"2026-10-14T00:12:03Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":388,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-15T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":82},"rest":"https://alion.io/mcp/rest/get_company?id=82"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fgoogle-silicon-soc-design-verification-engineer-hsio"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fgoogle-silicon-soc-design-verification-engineer-hsio"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fgoogle-silicon-soc-design-verification-engineer-hsio"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/google-silicon-soc-design-verification-engineer-hsio\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fgoogle-silicon-soc-design-verification-engineer-hsio"}]}