Salary
≈ $28k – $65k per year (Estimated)
Location
In office (Bengaluru)
Seniority
Staff · 10+ years exp
Confirmed on the employer's own hiring board on Oct 13, 2026. First seen by Alion on Oct 9, 2026. Google scores B on the Alion truth index.
Overview
Company
Impact
Profile match
Google is an American technology company founded in 1998 by Larry Page and Sergey Brin and now the principal subsidiary of Alphabet, headquartered in Mountain View, California. It operates the world's dominant search engine and the advertising system built around it, along with YouTube, Android, Chrome, Gmail, Maps, Workspace and Google Cloud, reaching billions of users across nearly every internet-connected market. The company designs its own silicon in the Tensor Processing Unit line, develops the Gemini foundation models through Google DeepMind, and derives most of its revenue from advertising while cloud has become its fastest growing segment.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
- Lead SoC/SS integration team. Drive development of complex IPs and Subsystems along with a team of engineers in the Bengaluru design organization.
- Own microarchitecture and implementation of IPs and subsystems.
- Work with Architecture, Firmware and Software teams to drive feature closure and develop microarchitecture specifications.
- Drive design methodology, libraries, debug, code review in coordination with other IPs Design Verification (DV) teams and physical design teams.
- Identify and drive Power, Performance and Area improvements for the domains owned.
Qualifications
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 10 years of experience in ASIC development with Verilog/SystemVerilog, VHDL, or Chisel.
- 5 years of experience in micro-architecture and design of SoCs and subsystems.
- 4 years of experience in people management, developing employees.
- Experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT).
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience in SoC designs and integration flows.
- Knowledge of arithmetic units, bus architectures, processor design, accelerators, or memory hierarchies.
- Knowledge of high-performance and low power design techniques.
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