{"id":2602488,"url":"https://alion.io/job/google-silicon-test-engineer-soc-asic","title":"Silicon Test Engineer, SOC, ASIC","company":{"id":82,"name":"Google","domain":"google.com","url":"https://alion.io/company/google","size_band":"11-50","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Career site","truth_index":{"grade":"B","score":75,"open_postings":116,"ghost_share":0,"stale_share":0.983,"repost_share":0,"time_to_fill_p50_days":30,"computed_at":"2026-10-15T05:46:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":18500,"max_usd":47000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":14},"experience_years_min":8,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[],"status":"live","first_seen_at":"2026-10-15T07:42:27Z","employer_posted_date":"2026-10-15","last_verified_at":"2026-10-15T19:36:42Z","board_verified":true,"closed_at":null,"days_open":0,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":0},"description":"About the job\nBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.\nGoogle's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.Responsibilities\nDesign, implement, and manage Integrated Circuit (IC) product bring-up, verification, and characterization programs for NPI, including ATE test programs, load boards, and probe cards using ATE platforms such as UFLEX or 93K.\nDrive test development, validation, and characterization for high-speed interfaces including DDR memory and High-Speed I/O (HSIO) IPs, ensuring production screen enabement and low Defective Parts Per Million (DPPM).\nCollaborate with vendors and internal teams to engineer high-volume ATE manufacturing solutions tailored for advanced packaging.\nExecute product and DPPM correlation between ATE and system-level environments for new products, and enhance test coverage and resolve the failure modes via rigorous troubleshooting on ATE and SLT systems.\nDirect production sustaining activities, including program upgrades, yield optimization, test time reduction, lot disposition, and RMA analysis.\nQualifications\nMinimum qualifications:\nBachelor's degree in Electrical Engineering, Computer Engineering, Microelectronics, or equivalent practical experience.\n8 years of experience in Semiconductor Domain.\nExperience in ATE test program development, hardware architecture, and post-silicon bring-up for complex Digital/Mixed-Signal SoCs.\nExperience in ASIC/SoC test development, bring-up, or debug.\nPreferred qualifications:\nMaster's degree or PhD in Electrical Engineering, Computer Engineering, or a related technical field.\nExperience with ATE platforms (Teradyne UltraFlex SOC and Advantest 93K) and knowledge of high-speed interfaces (DDR, PCIe, SERDES).\nProven track record in semiconductor processing, VLSI product/test engineering, with SLT expertise using the Advantest platform.\nProficiency in DFT methodologies, including memory BIST, JTAG, Scan/ATPG, and testing for PVT and temperature sensors.\nExpertise in Test Time Reduction (TTR) strategies, Gage R&R, DPPM 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