{"id":3301747,"url":"https://alion.io/job/google-staff-design-engineer-networking-google-cloud-2","title":"Staff Design Engineer, Networking, Google Cloud","company":{"id":82,"name":"Google","domain":"google.com","url":"https://alion.io/company/google","size_band":"11-50","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Career site","truth_index":{"grade":"B","score":81,"open_postings":152,"ghost_share":0.046,"stale_share":0.632,"repost_share":0.046,"time_to_fill_p50_days":30,"computed_at":"2026-10-29T05:49:05Z"}},"role":"Frontend","role_family":"Frontend","seniority":"staff","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Tel Aviv, Israel"],"countries":["IL"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":131000,"max_usd":293000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":105},"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"GCP","optional":false},{"name":"Gemini","optional":false},{"name":"Machine Learning","optional":false},{"name":"TPU","optional":false},{"name":"Vertex AI","optional":false},{"name":"C++","optional":true},{"name":"Python","optional":true}],"status":"live","first_seen_at":"2026-10-26T10:38:52Z","employer_posted_date":"2026-10-26","last_verified_at":"2026-10-29T19:20:09Z","board_verified":true,"closed_at":null,"days_open":3,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":3},"description":"About the job\nBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.\nIn this role, you will be part of a team developing application-specific integrated circuits (ASICs) used to accelerate networking in data centers. You will have multiple responsibilities in areas such as project definition, design, and implementation. You will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators.You will also be responsible for performance analysis for a networking stack using your knowledge.\nThe ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.\nWe prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.\nResponsibilities\nLead an ASIC subsystem.\nUnderstand how it interacts with software and other ASIC subsystems to implement data center networks.\nDefine hardware/software interfaces. Write micro architecture and design specifications.\nDefine efficient micro-architecture and block partitioning/interfaces and flows.\nCollaborate closely with software, verification, and physical design stakeholders to ensure the designs are complete, correct, and performant.\nQualifications\nMinimum qualifications:\nBachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.\n10 years of experience architecting networking ASICs from specification to production.\nExperience developing Register-Transfer Level (RTL) for ASIC subsystems.\nExperience with cross-functional engagement in micro-architecture, design, verification, logic synthesis, and timing closure.\nPreferred qualifications:\nExperience working with software teams optimizing the hardware/software interface.\nExperience architecting networking switches, end points, and hardware offloads.\nExperience working with design networking like: remote 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