{"id":3264612,"url":"https://alion.io/job/graphcore-director-logical-design","title":"Director, Logical Design","company":{"id":33,"name":"Graphcore","domain":"graphcore.ai","url":"https://alion.io/company/graphcore","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Greenhouse","truth_index":{"grade":"A","score":92,"open_postings":154,"ghost_share":0,"stale_share":0.117,"repost_share":0,"time_to_fill_p50_days":69,"computed_at":"2026-10-26T05:57:25Z"}},"role":"Hardware","role_family":"Hardware","seniority":"head","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":44000,"max_usd":85000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":94},"experience_years_min":18,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-10-26T04:33:46Z","employer_posted_date":"2026-10-26","last_verified_at":"2026-10-26T17:58:51Z","board_verified":true,"closed_at":null,"days_open":0,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":0},"description":"Job Summary\nOur team is at the forefront of the artificial intelligence revolution, enabling innovators from all industries and sectors to expand human potential with technology. The availability of specialised artificial intelligence compute will be a decisive factor in AI’s rate of progress. Graphcore allows innovators to go further, faster. What we do really makes a difference.\nWe are looking for an experienced engineering leader to drive the design and development of complex, high-performance SoCs for next-generation AI acceleration platforms.\nThe role combines strong technical expertise with people leadership and engineering execution, requiring the ability to guide technical decisions, build high-performing teams and deliver high-quality silicon solutions.\nThe Team\nThe SoC Design team is responsible for the RTL design, development and integration of critical subsystems within Graphcore’s AI acceleration platforms.\nThe team works closely with architecture, verification, DFT and physical design teams throughout the silicon development lifecycle, from microarchitecture through implementation and sign-off.\nResponsibilities and Duties\nProvide technical leadership for microarchitecture, RTL design and SoC integration, driving design decisions and trade-offs across functionality, performance, power and area.\nLead engineering execution and delivery of complex SoC designs, ensuring alignment with project milestones, quality objectives and tapeout schedules.\nDrive design quality and implementation readiness, including CDC/RDC, synthesis, timing closure and physical implementation considerations.\nCollaborate with architecture, verification, DFT and physical design teams to resolve complex technical challenges and ensure successful silicon delivery.\nIdentify and manage technical risks, resource requirements and cross-functional dependencies to ensure effective project execution.\nBuild, lead and develop a high-performing engineering team through coaching, mentoring, performance management and talent development.\nDrive continuous improvement in design methodologies, engineering processes and team productivity.\nRepresent the design team in technical reviews, project planning and cross-functional discussions, ensuring alignment with broader engineering objectives.\nCandidate Profile\nEssential:\nDegree in Electronic Engineering, Computer Science or a related discipline with 18+ Years of experience\nExtensive experience in ASIC/SoC design and development, including technical leadership and engineering management.\nProven experience leading engineering teams through multiple complex SoC tapeouts, with end-to-end ownership of design execution and delivery.\nStrong expertise in digital design, microarchitecture, RTL development and complex SoC integration.\nIn-depth knowledge of Verilog/SystemVerilog, SoC interconnect protocols and clock/reset architectures.\nGood understanding of synthesis, static timing analysis, CDC/RDC, low-power design and physical implementation considerations.\nDemonstrated ability to manage technical risks, schedules, resources and cross-functional dependencies across complex silicon development programs.\nProven experience in building, managing and developing high-performing engineering teams.\nStrong technical judgement, problem-solving and decision-making skills.\nExcellent communication, stakeholder management and collaboration skills, with experience working across globally distributed teams.\nDesirable\nExperience in high-performance, multicore or AI accelerator SoC development.\nExperience with advanced process technologies and physically aware RTL design.\nKnowledge of DFT methodologies, low-power design and multi-voltage domain integration.\nExperience with multi-die or chiplet-based SoC architectures.\nKnowledge of high-speed interfaces such as PCIe, DDR and Ethernet.\nExperience in silicon bring-up, post-silicon debugging and ECO implementation.\nExperience driving engineering methodology improvements and design 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now","p_open":1,"p_active":0.86,"p_room":1,"age_days":0,"expected_fill_days":69,"reasons":["conf:4","win:early","comp:brand"],"computed_at":"2026-10-26T22:40:11Z"},"pay":null,"html_url":"https://alion.io/job/graphcore-director-logical-design","json_url":"https://alion.io/job/graphcore-director-logical-design.json","meta":{"generated_at":"2026-10-26T22:40:11Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per 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