Release Engineer
Confirmed on the employer's own hiring board on Oct 19, 2026. First seen by Alion on Apr 28, 2026. Grovf scores B on the Alion truth index.
About Grovf
Our work environment is dynamic, educational, and challenging, offering employees the opportunity to contribute to the development of next-generation networking devices for Next generation AI Infrastructure that lead the industry in performance and power efficiency. As part of the team, you will be involved in all stages of ASIC development, including Micro-Architecture, Design, and Verification. Our collaborative environment fosters growth, innovation, and leadership, offering the opportunity to work alongside industry experts and contribute to groundbreaking advancements.
At Grovf, every individual plays a vital role in the company's success. If you're looking for a rewarding career, talented colleagues, and a great environment that fosters growth, challenges, and leadership, Grovf is the place for you.
Role Overview
We are looking for a Release Engineer to own the delivery of hardware IP and related artifacts to our customers. The right candidate is highly detail-oriented, comfortable reading verification and synthesis reports, and able to write Python scripts to automate repetitive tasks in the release flow.
Responsibilities
Manage the end-to-end release process: preparing, validating, and delivering release packages to customers
Review all known issues and covered bugs before each delivery - nothing ships undocumented
Maintain release checklists and ensure all sign-off criteria are met across design and verification teams
Read and assess synthesis and lint reports as part of the release gate
Write and maintain Python scripts to automate report parsing, packaging, and checklist validation
Communicate release status and risks clearly to both engineering and program management
Requirements
- 3+ years of experience in a semiconductor or ASIC engineering environment
- Strong attention to detail - able to spot covered issues and inconsistencies across large report sets
- Understanding of hardware verification concepts (simulation, regressions)
- Familiarity with synthesis and lint flows and ability to interpret their outputs
- Solid Python skills for scripting and automation
- Clear written communication for release notes and customer-facing documentation
- Hands-on experience with Synopsys and Questa EDA tools
- Experience with Git for version control
- Experience delivering IP to external customers under NDA
If you are thorough by nature, technically grounded in hardware flows, and enjoy building tools that make processes more reliable- we would love to hear from you.