{"id":2503690,"url":"https://alion.io/job/grovf-senior-asic-design-engineer","title":"Senior ASIC Design Engineer","company":{"id":3791252,"name":"Grovf","domain":"grovf.com","url":"https://alion.io/company/grovf","size_band":null,"is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Spark","truth_index":{"grade":"B","score":75,"open_postings":7,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":null,"computed_at":"2026-10-15T05:46:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Armenia"],"countries":["AM"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":29000,"max_usd":65000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":1655},"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"Python","optional":true}],"status":"live","first_seen_at":"2026-03-24T00:00:00Z","employer_posted_date":"2026-03-24","last_verified_at":"2026-10-16T00:55:36Z","board_verified":true,"closed_at":null,"days_open":206,"trust":{"level":"stale","repost_count":0,"flags":["stale"],"days_open":205},"description":"About Grovf\nGrovf is seeking a talented Senior ASIC Design Engineer to join our team in Armenia. We offer a dynamic, learning-driven, and challenging environment where you will contribute to the development of next-generation networking devices for AI infrastructure, pushing the boundaries of performance and power efficiency.\nAs part of the team, you will play a key role in ASIC development, contributing to micro-architecture definition and leading RTL design efforts, while working closely with verification and architecture teams to deliver high-quality, scalable solutions.\nOur collaborative environment fosters growth, innovation, and leadership, providing the opportunity to take ownership, influence technical decisions, and make a meaningful impact.\nAt Grovf, every individual plays a vital role in the company’s success. If you are looking for a rewarding career, talented colleagues, and an environment that encourages growth, challenge, and leadership, Grovf is the place for you.\nResponsibilities\nLead RTL design for complex, high-performance IP blocks\nContribute to and influence micro-architecture decisions\nDrive design quality, performance, and scalability (PPA optimization)\nCollaborate closely with verification teams to ensure robust coverage\nDebug and resolve complex design issues across development stages\nMentor junior engineers and support team growth\nWork cross-functionally with architecture, verification, and physical design teams\nRequirements\n5-8+ years of experience in ASIC/RTL design\nStrong expertise in Verilog/SystemVerilog\nProven experience designing complex, high-performance IP\nSolid understanding of digital design fundamentals and computer architecture\nExperience with synthesis, timing, and performance optimization\nStrong debugging and problem-solving skills\nAbility to take ownership and drive technical solutions\nGood communication skills and mentoring mindset\nNice to Have\nExperience with high-speed protocols (PCIe, Ethernet, etc.)\nKnowledge of low-power design techniques\nScripting skills (Python, Tcl)\nExperience working in cross-functional, fast-paced environments\nLanguage Requirement\nEnglish: B2 or higher\nIf you are interested in\nDesigning complex, high-performance ASICs and RTL systems\nDriving architecture and design decisions\nSolving challenging problems related to performance, power, and scalability\nMentoring engineers and contributing to a strong engineering culture\nWe would love to hear from you.","description_format":"text","description_chars":2460,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[{"language":"English","level":"Upper-Intermediate (B2)","optional":true}]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":[],"lifecycle":[{"event":"open","at":"2026-10-14T06:59:53Z"}],"visa":[],"liveness":{"score":5,"band":"cold","label":"Long shot","p_open":1,"p_active":0.184,"p_room":0.28,"age_days":205,"expected_fill_days":23,"reasons":["conf:3","win:tail","crowd:"],"computed_at":"2026-10-15T05:46:00Z"},"pay":null,"html_url":"https://alion.io/job/grovf-senior-asic-design-engineer","json_url":"https://alion.io/job/grovf-senior-asic-design-engineer.json","meta":{"generated_at":"2026-10-16T04:16:05Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":970,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-17T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":3791252},"rest":"https://alion.io/mcp/rest/get_company?id=3791252"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fgrovf-senior-asic-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fgrovf-senior-asic-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fgrovf-senior-asic-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/grovf-senior-asic-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fgrovf-senior-asic-design-engineer"}]}