{"id":1536854,"url":"https://alion.io/job/hcltech-design-lead","title":"Design Lead","company":{"id":225,"name":"HCLTech","domain":"hcltech.com","url":"https://alion.io/company/hcltech","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"SuccessFactors","truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":null,"work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":[],"countries":[],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Synopsys SpyGlass","optional":true},{"name":"Verilog","optional":true}],"status":"live","first_seen_at":"2026-09-30T19:16:48Z","employer_posted_date":"2026-09-30","last_verified_at":"2026-10-05T01:06:04Z","board_verified":true,"closed_at":null,"days_open":4,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":4},"description":"Job Summary\nSub-system level: Hands-on experience to do scan insertion, ATPG coverage improvement, Pattern Generation/Simulation. Should have expertise on Simulation debug No-timing/Timing.\n\"Sub-system level: Hands-on Experience to do MBIST Insertion, Verification, Pattern generation. Thorough with Diagnostics and Repairability concepts.\nGood to have functional & integration knowledge of TAP controllers and JTAG. Working knowledge of JTAG, iJTAG, ICL, PDL etc.\"\n\"DFX and DFD feature insertion and verification at SS level. SOC level verification for the same.\nQC checks post RTL insertion, SpyGlass, CDC, RDC, VCLP etc.\"\nCapable of doing SOC level verification, Pattern sim and delivery.\nShould be able to handle cluster team of 2-3 members.\nMust be aware of interface to ATEs, tester hand-off languages/TDL/Verilog and must know to drive/modify test procedures. Desirable to have experience in Post Silicon Debug on Tester.\nGood at Communication. Compatible of working Remotely / Hybrid method with multiple sites.\nKey Responsibilities\nSub-system level: Hands-on experience to do scan insertion, ATPG coverage improvement, Pattern Generation/Simulation. Should have expertise on Simulation debug No-timing/Timing.\n\"Sub-system level: Hands-on Experience to do MBIST Insertion, Verification, Pattern generation. Thorough with Diagnostics and Repairability concepts.\nGood to have functional & integration knowledge of TAP controllers and JTAG. Working knowledge of JTAG, iJTAG, ICL, PDL etc.\"\n\"DFX and DFD feature insertion and verification at SS level. SOC level verification for the same.\nQC checks post RTL insertion, SpyGlass, CDC, RDC, VCLP etc.\"\nCapable of doing SOC level verification, Pattern sim and delivery.\nShould be able to handle cluster team of 2-3 members.\nMust be aware of interface to ATEs, tester hand-off languages/TDL/Verilog and must know to drive/modify test procedures. Desirable to have experience in Post Silicon Debug on Tester.\nGood at Communication. Compatible of working Remotely / Hybrid method with multiple sites.\nSkill Requirements\nOther Requirements","description_format":"text","description_chars":2086,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["IT Consulting & Digital Transformation","IT Outsourcing & Dedicated Teams","Systems Integrators"],"lifecycle":[{"event":"open","at":"2026-09-30T19:16:48Z"}],"visa":[],"liveness":{"score":90,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.903,"p_room":1,"age_days":3,"expected_fill_days":20,"reasons":["conf:0","velocity","win:early","comp:brand"],"computed_at":"2026-10-04T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/hcltech-design-lead","json_url":"https://alion.io/job/hcltech-design-lead.json","meta":{"generated_at":"2026-10-05T01:16:09Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","usage":{"tier":"crawler","counted_by":"address","units_charged":1,"used_today":1622,"day_limit":5000,"remaining_today":3378,"minute_limit":60,"resets_at":"2026-10-06T00:00:00Z"}}}