{"id":3150297,"url":"https://alion.io/job/hcltech-et-senior-solution-architect-2","title":"ET - Senior Solution Architect","company":{"id":225,"name":"HCLTech","domain":"hcltech.com","url":"https://alion.io/company/hcltech","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"SuccessFactors","truth_index":null},"role":"Solutions","role_family":"Solutions","seniority":"staff","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":30000,"max_usd":53000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":37},"experience_years_min":12,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Git","optional":false},{"name":"Synopsys Design Compiler","optional":false},{"name":"Synopsys SpyGlass","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"Perl","optional":true},{"name":"Python","optional":true}],"status":"live","first_seen_at":"2026-10-23T11:53:27Z","employer_posted_date":"2026-10-23","last_verified_at":"2026-10-28T13:49:22Z","board_verified":true,"closed_at":null,"days_open":5,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":5},"description":"Job Summary\n������Role Overview\nLead and own SoC RTL integration for complex chips, ensuring seamless assembly of multiple IPs/subsystems into a functionally correct, synthesis-ready top-level design. This role is central to aligning architecture, design, verification, and physical teams for successful tapeout.\n������Key Responsibilities\n������RTL Integration Ownership\nOwn top-level RTL integration of SoC:\nIntegrate multiple IPs, subsystems, and third-party blocks\nEnsure clean connectivity, hierarchy, and modular structure\nDeliver synthesis-ready, lint-clean, and CDC-clean RTL\nKey Responsibilities\n������Architecture Alignment\nWork closely with architecture teams to:\nTranslate SoC architecture into RTL structure\nEnsure correct implementation of:\nInterconnects (NoC / bus-based)\nAddress maps\nReset and clock architecture\n������Interface & Connectivity Management\nDefine and validate:\nIP interfaces and protocols (AXI, AHB, APB, etc.)\nAddress decoding and interconnect connectivity\nSkill Requirements\nResolve:\nInterface mismatches\nIntegration conflicts across teams\n������Clock, Reset & Power Integration\nDefine and integrate:\nClocking architecture (multiple clock domains)\nReset strategies (global/local resets)\nPower domains (UPF/CPF alignment)\nEnsure:\nClean CDC/RDC implementation\nProper low-power intent integration\n������Quality & Signoff Readiness\nDrive RTL quality checks:\nLint (SpyGlass, Lint tools)\nCDC/RDC analysis\nBasic synthesis checks\nEnsure RTL is:\nDV-ready\nDFT-ready\nPD-friendly\nOther Requirements\n������Collaboration Across Teams\nInterface with:\nIP/RTL design teams\nDV teams (for testbench integration support)\nDFT teams (for scan/test readiness)\nPD/STA teams (for implementation alignment)\nAct as central integration point across all domains\n������Debug & Issue Resolution\nLead debug of:\nIntegration bugs\nBoot-up and reset sequence issues\nConnectivity and functional mismatches\nSupport system-level bring-up in simulation/emulation\n������Automation & Flow Development\nDevelop scripts/tools for:\nRTL stitching\nConnectivity checks\nBuild and regression flows\nImprove integration efficiency and repeatability\n������Leadership\nLead and mentor RTL integration engineers\nDrive integration schedules, milestones, and reviews\nAct as owner of top-level RTL quality and readiness\n������Required Skills & Expertise\n������Technical\nStrong expertise in:\nVerilog/SystemVerilog RTL design\nSoC integration and architecture\nDeep understanding of:\nBus protocols (AXI/AHB/APB)\nClock/reset domain design\nLow-power design (UPF/CPF basics)\nExperience with:\nLint, CDC/RDC tools\nSynthesis awareness\n������Experience\n12-18+ years in RTL design/integration\nProven experience in:\nChip-level RTL integration ownership\nMultiple SoC tapeouts\n������Tools\nLint: SpyGlass / Questa Lint\nCDC: SpyGlass CDC / Questa CDC\nSynthesis: Design Compiler / Genus (basic awareness)\nVersion control: Git/Perforce\n������Soft Skills\nStrong system-level thinking\nExcellent coordination across large teams\nProblem-solving and debugging mindset\n������Good to Have\nExperience in:\nNoC-based SoC architectures\nEmulation/FPGA bring-up\nFirmware/boot flow understanding\nScripting:\nPython / TCL / Perl\n������Success Metrics\nClean, integration-ready RTL (lint/CDC clean)\nSmooth handoff to DV, DFT, and PD teams\nMinimal integration bugs at system level\nPredictable integration schedules\nFirst-pass success in SoC bring-up","description_format":"text","description_chars":3384,"description_truncated":false,"requirements":{"experience_years_min":12,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["IT Consulting & Digital Transformation","IT Outsourcing & Dedicated Teams","Systems Integrators"],"lifecycle":[{"event":"open","at":"2026-10-23T11:53:27Z"}],"visa":[],"liveness":{"score":90,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.903,"p_room":1,"age_days":4,"expected_fill_days":31,"reasons":["conf:3","velocity","win:early","comp:brand"],"computed_at":"2026-10-28T05:59:10Z"},"pay":null,"html_url":"https://alion.io/job/hcltech-et-senior-solution-architect-2","json_url":"https://alion.io/job/hcltech-et-senior-solution-architect-2.json","meta":{"generated_at":"2026-10-28T17:34:01Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":23938,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-29T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":225},"rest":"https://alion.io/mcp/rest/get_company?id=225"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fhcltech-et-senior-solution-architect-2"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fhcltech-et-senior-solution-architect-2"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fhcltech-et-senior-solution-architect-2"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/hcltech-et-senior-solution-architect-2\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fhcltech-et-senior-solution-architect-2"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3150297}},{"tool":"search_jobs","arguments":{"company":"hcltech.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3150297},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. Docs: https://alion.io/developers"}}