{"id":4010464,"url":"https://alion.io/job/hcltech-senior-design-lead-37","title":"Senior Design Lead","company":{"id":225,"name":"HCLTech","domain":"hcltech.com","url":"https://alion.io/company/hcltech","size_band":"5000+","is_staffing_agency":false,"employer_type":"services","is_intermediary":false,"listed_via":null,"ats_vendor":"SuccessFactors","truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence AFS","optional":false},{"name":"Cadence Spectre X","optional":false},{"name":"Cadence Virtuoso","optional":false},{"name":"Cadence Spectre","optional":true}],"status":"live","first_seen_at":"2026-11-10T09:44:10Z","employer_posted_date":"2026-11-10","last_verified_at":"2026-11-10T09:44:10Z","board_verified":true,"closed_at":null,"days_open":0,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":0},"description":"Job Summary\nOpen position 4\nExp :-- No particular number of years experience required once they meet the JD below , which implies a certain level of experience. Equally a person with 20 years experience doing power management is not useful as they cannot meet the mandatory parts of the JD.\nJob description for the analog circuit verification role below\n-------------------------------------------------------------------------------------------------------------------------------------------------\nMandatory\nGood communicator in English in written and verbal form\nHas some exposure, circuit design or analog verification, to serDes or clocking circuits at low or high data rates (minimum 1G)\no Serdes circuits\n Tx Output Driver, Tx serializer, Marching network, Termination circuits Rx CTLE, Rx DFE, RX deseilaizer Rx TISAR ADC, Piplelined ADC, Track and hold circuits passive and active,\no Clocking circuits\n PLL, DLL, ILO, Phase Interpolator, VCO (LC or Ring ), Charge Pump, PFD, TDC, PLL filter (integrating or proportional), prescalar, divider, clock buffering (CML or CMOS)\nHighly skilled in Cadence Virtuoso toolset and use of Spectre-X (Cadence), AFS (Siemens) and Solido PVTMC/HSV (Siemens) simulation tools\nIs strong at testbench creation given a circuit block spec\nUses automated measurements using MDL and/or Ocean to check simulations and for reporting\nGood presentation skills in terms of generating and presenting simulation reports\nDesirable\nHigher rates >10G on the above circuits\nCircuit porting skills\no Design tweaks and analog verification\nKey Responsibilities\nOpen position 4\nExp :-- No particular number of years experience required once they meet the JD below , which implies a certain level of experience. Equally a person with 20 years experience doing power management is not useful as they cannot meet the mandatory parts of the JD.\nJob description for the analog circuit verification role below\n-------------------------------------------------------------------------------------------------------------------------------------------------\nMandatory\nGood communicator in English in written and verbal form\nHas some exposure, circuit design or analog verification, to serDes or clocking circuits at low or high data rates (minimum 1G)\no Serdes circuits\n Tx Output Driver, Tx serializer, Marching network, Termination circuits Rx CTLE, Rx DFE, RX deseilaizer Rx TISAR ADC, Piplelined ADC, Track and hold circuits passive and active,\no Clocking circuits\n PLL, DLL, ILO, Phase Interpolator, VCO (LC or Ring ), Charge Pump, PFD, TDC, PLL filter (integrating or proportional), prescalar, divider, clock buffering (CML or CMOS)\nHighly skilled in Cadence Virtuoso toolset and use of Spectre-X (Cadence), AFS (Siemens) and Solido PVTMC/HSV (Siemens) simulation tools\nIs strong at testbench creation given a circuit block spec\nUses automated measurements using MDL and/or Ocean to check simulations and for reporting\nGood presentation skills in terms of generating and presenting simulation reports\nDesirable\nHigher rates >10G on the above circuits\nCircuit porting skills\no Design tweaks and analog verification\nSkill Requirements\nOther Requirements","description_format":"text","description_chars":3174,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[{"language":"English","level":"Upper-Intermediate (B2)","optional":false}]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["IT Consulting & Digital Transformation","Managed IT Services (MSP)","Systems Integrators","Engineering Services"],"lifecycle":[{"event":"open","at":"2026-11-10T09:44:10Z"}],"visa":[],"liveness":{"score":86,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.86,"p_room":1,"age_days":0,"expected_fill_days":27,"reasons":["conf:1","win:early","comp:brand"],"computed_at":"2026-11-10T11:01:02Z"},"pay":null,"html_url":"https://alion.io/job/hcltech-senior-design-lead-37","json_url":"https://alion.io/job/hcltech-senior-design-lead-37.json","meta":{"generated_at":"2026-11-10T11:01:02Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":25523,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-11T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.1,"usd":0.01,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":225},"rest":"https://alion.io/mcp/rest/get_company?id=225"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fhcltech-senior-design-lead-37"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":2,"usd":0.2},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fhcltech-senior-design-lead-37"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.1,"usd":0.01},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fhcltech-senior-design-lead-37"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/hcltech-senior-design-lead-37\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fhcltech-senior-design-lead-37"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":4010464}},{"tool":"search_jobs","arguments":{"company":"hcltech.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":4010464},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. Docs: https://alion.io/developers"}}