{"id":2155909,"url":"https://alion.io/job/hcltech-senior-design-lead-bios-testinterfaceuc-board-design-cpu-2","title":"Senior Design Lead - BIOS, Test/Interface/Uc Board Design, CPU","company":{"id":225,"name":"HCLTech","domain":"hcltech.com","url":"https://alion.io/company/hcltech","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"SuccessFactors","truth_index":null},"role":"Design","role_family":"Design","seniority":"lead","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"inferred","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":28000,"max_usd":54000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":13},"experience_years_min":8,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Altium Designer","optional":false},{"name":"Cadence Allegro","optional":false},{"name":"JTAG Debuggers","optional":false},{"name":"Mentor Xpedition","optional":false},{"name":"OrCAD","optional":false}],"status":"live","first_seen_at":"2026-10-09T06:38:21Z","employer_posted_date":"2026-10-09","last_verified_at":"2026-10-20T08:39:52Z","board_verified":true,"closed_at":null,"days_open":11,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":11},"description":"Job Summary\nseeking an experienced Silicon Validation Board Design Engineer to design, develop, and support hardware platforms used for pre-silicon emulation, post-silicon validation, characterization, and bring-up of complex SoCs/ASICs. The candidate will work closely with silicon design, validation, firmware, and software teams to enable efficient debug and validation of next-generation\nKey Responsibilities\nDesign high-speed validation and characterization boards for ASICs, SoCs, MCUs, and FPGAs.Develop schematics and oversee PCB layout for multilayer boards.Design interfaces including:\nPCIe\nUSB\nEthernet\nDDR/LPDDR\nMIPI CSI/DSI\nSignal & Power Integrity\nConduct Signal Integrity (SI) analysis for high-speed interfaces.\nPerform Power Integrity (PI) simulations and power delivery network validation.\nDefine stack-ups and routing constraints for high-speed PCB designs.\nWork with PCB vendors and assembly houses for successful board fabrication.\nSilicon Bring-up & Validation\nSupport first silicon bring-up activities.\nDevelop validation plans and debug methodologies.\nInvestigate silicon, board, and system-level issues.\nPerform hardware debugging using:Oscilloscope\nLogic analyzer\nProtocol analyzers\nJTAG debuggers\nSpectrum analyzers\n\nSkill Requirements\nB.E./B.Tech/M.E./M.Tech in Electronics, Electrical Engineering,\n8+ years (Lead Engineer)\nTechnical Skills\nSchematic design tools:Cadence OrCAD/Allegro\nAltium Designer\nMentor Graphics Xpedition\n\nPCB design for 10+ layer high-speed boards.\nDDR3/DDR4/DDR5 or LPDDR design experience.\nKnowledge of PCIe Gen4/Gen5 design considerations.\nPower supply design including PMICs and DC-DC converters.\nJTAG and boundary scan debugging.\nSilicon validation methodologies.\nOther Requirements\nLab Skills\nOscilloscope measurements up to multi-GHz ranges.\nHigh-speed serial interface debug.\nPower rail characterization and current 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