{"id":1536786,"url":"https://alion.io/job/hcltech-senior-designer-3","title":"Senior Designer","company":{"id":225,"name":"HCLTech","domain":"hcltech.com","url":"https://alion.io/company/hcltech","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"SuccessFactors","truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":[],"countries":[],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":3,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Linux","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-09-30T19:16:48Z","employer_posted_date":"2026-09-30","last_verified_at":"2026-10-07T00:38:40Z","board_verified":true,"closed_at":null,"days_open":6,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":6},"description":"Job Summary\nSenior Standard Cell Characterization Engineer to work on library characterization and model generation for advanced CMOS/FinFET technologies. The role involves generating high-quality Liberty (.lib) files, collaborating with design and layout teams, and supporting automation and validation of characterization flows.\nKey Responsibilities\nPerform standard cell library characterization and generate:\nTiming, power, noise, and variation models\nAccurate Liberty (.lib) files\nDevelop understanding and support for:\nCircuit design and layout interactions\nView generation and automation flows\nExecute SPICE simulations and analyze characterization results\nGenerate extracted netlists from layout and perform characterization\nValidate libraries through QA checks and consistency verification\nWork with different collateral views:\nGDS, .lib, Verilog (.v), IBIS (.ibs), .db, etc.\nCollaborate with design, layout, and CAD teams for end-to-end delivery\nRequired Skills (Must-Have)\nBasic understanding of CMOS and FinFET device characteristics\nBasic knowledge of digital circuit design (combinational & sequential)\nUnderstanding of SPICE simulations\nUnderstanding of library characterization concepts, including: NLDM and CCS models\nKnowledge of .lib generation and characterization flow\nFamiliarity with collateral views (GDS, .lib, Verilog, IBIS, .db)\nAbility to:\nGenerate extracted netlists\nPerform post-layout characterization\nUnderstanding of:\nLibrary validation and quality checks (QA)\nUnderstanding of scripting:\nLinux, Perl, Python, Tcl\nDesired Skills (Good-to-Have)\nExposure to:\nNoise and LVF characterization / dot_lib generation\nAPL characterization and modeling\nKnowledge of deep submicron process challenges\nHands-on experience in advanced nodes (≤16nm, FinFET)\nGood communication and teamwork skills\nPositive learning attitude and adaptability\nEducation & Experience\nB.Tech / M.Tech in Electronics / VLSI / related field with 3-6 years of experience in Standard cell characterization / view generation\nKeywords\nStandard Cell Characterization, Liberty (.lib), SPICE Simulation, CMOS, FinFET, NLDM, CCS, LVF, Timing Models, Power Models, SiliconSmart, Liberate, View Generation, QA Validation\nKey Responsibilities\nnull\nSkill Requirements\nnull\nOther Requirements\nnull","description_format":"text","description_chars":2280,"description_truncated":false,"requirements":{"experience_years_min":3,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["IT Consulting & Digital Transformation","IT Outsourcing & Dedicated Teams","Systems Integrators"],"lifecycle":[{"event":"open","at":"2026-09-30T19:16:48Z"}],"visa":[],"liveness":{"score":98,"band":"hot","label":"Hiring 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