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Salary
≈ $52k – $109k per year (Estimated)
Location
In office (Romania)
Seniority
Architect

Confirmed on the employer's own hiring board on Oct 19, 2026. First seen by Alion on Oct 18, 2026.

Overview
Company
Impact
Profile match
HCLTech is a major Indian multinational information technology (IT) services and consulting company headquartered in Noida, Uttar Pradesh. Spun off from the original HCL Group in 1991, it ranks as one of India's largest technology companies alongside firms like TCS, Infosys, and Wipro.

Job Summary

JD:

Candidate will be responsible for high performance controller (PCIe gen 6/7, LPDDR 5/6, Ethernet) IP verification.

  • Extract verification requirements from spec
  • Experience in architecting and writing Testbench from scratch or adding UVM components to an existing testbench.
  • Solid background in UVM/ System Verilog
  • Usage of protocol VIPs (PCIe, Ethernet, LPDDR, AMBA). Ability to debug VIP
  • Ability to define & write new tests
  • SVA - need to know how to write complex assertions checkers to validate functionality.
  • experience with writing coverage and stimulus to get the coverage for sign off.
  • Working as part of a Team with good debug skills.
  • Good communication skill to communicate bug/issues effectively

Able to work independently

Key Responsibilities

Skill Requirements

Other Requirements

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