{"id":3150286,"url":"https://alion.io/job/hcltech-solution-architect-31","title":"Solution Architect","company":{"id":225,"name":"HCLTech","domain":"hcltech.com","url":"https://alion.io/company/hcltech","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"SuccessFactors","truth_index":null},"role":"Solutions","role_family":"Solutions","seniority":"staff","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":34000,"max_usd":60000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":36},"experience_years_min":15,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Synopsys Design Compiler","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-10-23T11:53:27Z","employer_posted_date":"2026-10-23","last_verified_at":"2026-10-24T07:58:27Z","board_verified":true,"closed_at":null,"days_open":0,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":0},"description":"Job Summary\nRole Overview:\nThe Chip Lead is responsible for end-to-end ownership and successful execution of ASIC/SoC programs, spanning architecture alignment, design, verification, implementation, silicon validation, and customer delivery commitments. This role acts as the single point of technical and program accountability, ensuring schedule, quality, and cost objectives are met across cross-functional teams. Lead cross-functional engineering teams (RTL, DV, DFT, Physical Design, and Validation) and ensure your design meets Performance, Power and Area requirements\nKey Responsibilities\n1. Program Ownership & Execution\nOwn full-chip delivery from architecture freeze to silicon bring-up and production release\n(Lifecycle Ownership: Govern the IC development flow, overseeing RTL freeze, synthesis, place and route (PnR), static timing analysis (STA), and final GDS tape-out\nSilicon Bring-Up: Partner with post-silicon validation and software teams to debug and commercialize the chip)\nDefine and manage program milestones, schedules, and critical paths\nDrive execution across design, DV, DFT, PD, AMS, and software teams\nEnsure alignment to customer SoW, KPIs, and acceptance criteria\n2. Technical Leadership\nProvide technical direction and decision-making across all chip domains:\no Frontend (RTL, micro-architecture)\no Verification (block-level, subsystem, full-chip)\no Physical Design (PnR, STA, signoff)\no DFT and test strategy\no Power, performance, and area (PPA) optimization\no\n3. Technical Competency\nStrong expertise in:\no SoC/ASIC design lifecycle (RTL to GDSII)\no Multi-domain integration (digital, AMS, DFT, PD)\no Low-power design methodologies (UPF/CPF)\nExperience with:\no High-performance SoCs (CPU/GPU/AI accelerators preferred)\no Complex interconnects (NoC/Fabric)\no Architecture & Design: Drive SoC definitions, including micro-architecture, IP selection, memory hierarchies, and NoC fabrics\n4. Educational Qualification\nEducation: B.Tech/M.Tech in Electrical Engineering, Computer Science, or a related field.\nExperience: 15+ years of direct industry experience in complex ASIC/SoC design.\nTechnical Expertise: Deep knowledge of Verilog/SystemVerilog, EDA tools (Synopsys Design Compiler, Cadence), and multi-voltage/low-power design techniques.\nLeadership Skills: Proven track record of guiding globally distributed teams from specification to successful tape-out\nKey Responsibilities\n1. To assess the domain IT landscape assessment and Application portfolio optimization for gap analysis\n2. Creation of solution and architectural views (logical| conceptual| development| execution| infrastructure & operations architecture)\n3. To study and define system requirements addressing stakeholder| portfolio concerns\n4. To ensure knowledge up-gradation and work with new and emerging products/technologies\n5. To manage Non Functional Requirement adaption for the solution\n6. To contribute towards white/technical papers and knowledge base\nSkill Requirements\nnull\nOther Requirements\nnull","description_format":"text","description_chars":3008,"description_truncated":false,"requirements":{"experience_years_min":15,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["IT Consulting & Digital Transformation","IT Outsourcing & Dedicated Teams","Systems Integrators"],"lifecycle":[{"event":"open","at":"2026-10-23T11:53:27Z"}],"visa":[],"liveness":{"score":99,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.993,"p_room":1,"age_days":0,"expected_fill_days":31,"reasons":["conf:2","wave","velocity","win:early","comp:brand"],"computed_at":"2026-10-24T06:02:35Z"},"pay":null,"html_url":"https://alion.io/job/hcltech-solution-architect-31","json_url":"https://alion.io/job/hcltech-solution-architect-31.json","meta":{"generated_at":"2026-10-24T11:34:42Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":16514,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-25T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":225},"rest":"https://alion.io/mcp/rest/get_company?id=225"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fhcltech-solution-architect-31"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fhcltech-solution-architect-31"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fhcltech-solution-architect-31"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/hcltech-solution-architect-31\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fhcltech-solution-architect-31"}]}