Salary
≈ $68k – $146k per year (Estimated)
Location
In office (Mexico)
Seniority
Architect · 12+ years exp
Confirmed on the employer's own hiring board on Oct 22, 2026. First seen by Alion on Oct 20, 2026.
Overview
Company
Impact
Profile match
HCLTech is a major Indian multinational information technology (IT) services and consulting company headquartered in Noida, Uttar Pradesh. Spun off from the original HCL Group in 1991, it ranks as one of India's largest technology companies alongside firms like TCS, Infosys, and Wipro.
Job Summary
- Responsible for end-to-end development, integration, and enablement of PDKs supporting design, verification, and signoff across technology nodes
- Drives component development (PCells, techfiles, rule decks) while ensuring scalability, quality, and compliance with foundry requirements
Key Responsibilities
- Develop and integrate PDK components: devices, PCells, rule decks, technology files, and configurations
- Execute development tasks with increasing independence and ownership across modules and nodes
- Debug, validate, and ensure quality and consistency of PDK deliverables
- Collaborate with design, QA, CAD, and customers for issue resolution and alignment
- Build and scale automation frameworks for PDK generation, validation, and regression
- Drive methodology improvements, coding standards, and reusable architectures
- Lead multi-node development strategies (legacy → advanced nodes)
- Manage end-to-end delivery: planning, tracking, risk mitigation, and execution
- Mentor teams and build technical capability across functions
- Define organization-level development strategy, roadmap, and transformation initiatives
- Drive AI adoption for debugging, productivity, and predictive development workflows
Key Responsibilities
Required Skills
- Strong understanding of PDK architecture, device physics, and layout concepts
- Expertise in PDK components development (PCells, rule decks, techfiles)
- Proficiency in EDA tools (Cadence/Synopsys environments)
- Programming skills: SKILL, Python, Shell, Tcl/Perl
- Strong debugging, problem-solving, and cross-domain integration skills
- Experience in automation, scalable system design, and methodology definition
- Ability to lead teams, drive delivery, and manage customer communication
Skill Requirements
Tools
- Cadence Virtuoso, Synopsys Custom Compiler
- PCells/PyCells, Techfiles, Rule decks (DRC/LVS/DFM)
- Calibre, ICV, Pegasus, PVS
- SKILL, Python, Shell, Tcl/Perl
- Git, CI/CD pipelines
- AI-assisted debugging and automation tools
Other Requirements
Qualifications
- B.E./B.Tech/M.E./M.Tech in Electronics / Electrical / VLSI / Semiconductor or related field
- 12 -15 years of experience in PDK development, design enablement, or EDA flows
Nice to Have
- Multi-node PDK development (advanced nodes, FinFET)
- Cross-foundry PDK enablement experience
- Automation frameworks for PDK generation/validation
- AI/ML-driven debug and development workflows
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