{"id":453131,"url":"https://alion.io/job/headlands-technologies-fpga-engineer","title":"FPGA Engineer","company":{"id":174516,"name":"Headlands Technologies","domain":"headlandstech.com","url":"https://alion.io/company/headlands-technologies","size_band":"51-200","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Greenhouse","truth_index":{"grade":"B","score":75,"open_postings":6,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":null,"computed_at":"2026-10-27T05:46:45Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Chicago, United States","New York, United States","London, United Kingdom"],"countries":["US","GB"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":99000,"max_usd":224000,"period":"year","method":"role_country_seniority_unknown","sample_n":3123},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"GDPR","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false}],"status":"live","first_seen_at":"2026-06-10T17:56:40Z","employer_posted_date":"2026-10-08","last_verified_at":"2026-10-27T16:37:15Z","board_verified":true,"closed_at":null,"days_open":139,"trust":{"level":"stale","repost_count":0,"flags":["stale"],"days_open":138},"description":"FPGA Engineer Job Description for Headlands Tech\nLocations: Amsterdam; Chicago; London; New York \nScope:\nAs an FPGA Engineer at Headlands Tech, you will be responsible for digital circuit design and verification, developing in-house intellectual property, and scaling designs globally. You will work with cutting-edge hardware technologies to support the Firm's automated trading infrastructure.\nQualifications:\nProfessional experience with FPGA/ASIC design and verification\nExperience developing reusable IPs and scaling designs to multiple target platforms\nSolid understanding of digital design principles\nStrong working knowledge of either SystemVerilog/Verilog/VHDL\nIn-depth knowledge of common EDA tools\nKnowledge of C++ required\nFamiliarity with common scripting languages TCL/Python/Bash\nUniversity degree in EE, CS, CE or related technical field\nExperience with high-speed transceivers, networking protocols, and packet processing is preferred\nDay to Day:\nDesign and verify RTL implementations for trading systems\nDevelop reusable IP components that can be deployed across multiple platforms\nIntegrate hardware designs with wider technology stack\nScript automation tasks and workflow improvements\nCollaborate with software, research, and systems teams\nWe are proud to be an equal opportunity workplace and to provide employees with a work environment free of discrimination and harassment. All employment decisions at Headlands Tech are based on business needs, job requirements and individual qualifications, without regard to race, color, religion or belief, national origin, sex, sexual orientation, gender identity/expression, age, status as a protected veteran, status as an individual with a disability, or any other applicable legally protected characteristics. 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