{"id":163668,"url":"https://alion.io/job/hp-inc-asic-design-engineer","title":"ASIC Design Engineer","company":{"id":72,"name":"HP Inc.","domain":"hp.com","url":"https://alion.io/company/hewlett-packard","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":83,"open_postings":165,"ghost_share":0,"stale_share":0.673,"repost_share":0,"time_to_fill_p50_days":22,"computed_at":"2026-10-17T05:46:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"middle","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Singapore"],"countries":["SG"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":44000,"max_usd":92000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":17},"experience_years_min":3,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"Formal Verification","optional":false},{"name":"Git","optional":false},{"name":"GitHub","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-07-05T00:00:00Z","employer_posted_date":"2026-07-05","last_verified_at":"2026-10-18T07:23:30Z","board_verified":true,"closed_at":null,"days_open":105,"trust":{"level":"stale","repost_count":0,"flags":["stale"],"days_open":105},"description":"ASIC Design EngineerDescription -\nDescription\nWe are looking for a motivated ASIC Design Engineer to support the development of digital ASIC components for printing systems. The candidate will work closely with experienced engineers and contribute to design implementation, verification, and system integration activities.\nKey Responsibilities:\nDesign and develop functional blocks and subsystems of digital ASICs from specification through RTL implementation, verification, silicon validation, and qualification.\nSupport silicon validation and debug activities under the guidance of senior engineers.\nCollaborate with cross-functional teams to align on specifications, conduct design reviews, and maintain clear technical documentation\nContribute ideas to future ASIC design improvements and innovation efforts.\nDevelop understanding of Inkjet and LaserJet print architecture and data path requirements to support effective ASIC design and integration.\nSupport FPGA or software-based prototyping of ASIC designs to enable pre-silicon and post-silicon firmware development and system verification.\nContribute to design methodology improvements and tool automation to enhance engineering efficiency and design quality.\nIndividuals who do well in this role typically have:\nBS or MS degree in Electrical Engineering, Computer Engineering, or a related field, with a focus on VLSI or digital design.\nMinimum of 3 years of ASIC or SoC design experience.\nFamiliarity with the digital ASIC/SoC design flow from RTL development through silicon characterization.\nFamiliarity with Synopsys and Cadence EDA tools for simulation, synthesis, static timing analysis (STA), formal verification, and assertion-based verification.\nProficiency in Verilog/SystemVerilog and familiarity with scripting or programming languages such as Python, Perl, C, or C++.\nFamiliarity with version control and collaborative development workflows using tools such as Git or GitHub.\nStrong analytical and problem-solving skills and willingness to learn\nGood communication and teamwork skills\nWorking knowledge of electronic components, printed circuit assembly (PCA) design, and common lab test equipment is an advantage.\nExperience in one or more of the following areas is a strong plus:\nBasic knowledge of Inkjet or LaserJet printing technology\nFPGA design methodology using Xilinx or Intel/Altera tools.\nDesign database management, scripting, and design flow automation.\nARM-based processor or subsystem design including AMBA/AXI/AHB/APB familiarity\nMemory and storage subsystems such as DDR, Flash, and eMMC.\nUse of AI tools and scripting to improve design, verification, debug, and automation efficiency.\nGeneral AI knowledge and practical use of AI tools for research, learning, documentation, and problem-solving.\n#Li-Post\nJob -\nEngineeringSchedule -\nFull timeShift -\nNo shift premium (Singapore)Travel -\n25%Relocation -\nNoEqual Opportunity Employer (EEO)-\nHP, Inc. provides equal employment opportunity to all employees and prospective employees, without regard to race, color, religion, sex, national origin, ancestry, citizenship, sexual orientation, age, disability, or status as a protected veteran, marital status, familial status, physical or mental disability, medical condition, pregnancy, genetic predisposition or carrier status, uniformed service status, political affiliation or any other characteristic protected by applicable national, federal, state, and local law(s).\nPlease be assured that you will not be subject to any adverse treatment if you choose to disclose the information requested. This information is provided voluntarily. The information obtained will be kept in strict confidence.\nFor more information, review HP’sEEO Policy or read about your rights as an applicant under the law here: “ Know Your Rights: Workplace Discrimination is Illegal \"","description_format":"text","description_chars":3847,"description_truncated":false,"requirements":{"experience_years_min":3,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":true,"industries":["Laptops","Computer Peripherals","3D Printers & Additive Manufacturing","Printers & Scanners"],"lifecycle":[{"event":"open","at":"2026-07-05T00:00:00Z"}],"visa":[],"liveness":{"score":5,"band":"cold","label":"Long shot","p_open":1,"p_active":0.185,"p_room":0.28,"age_days":104,"expected_fill_days":22,"reasons":["conf:1","stale_co","velocity","win:tail","crowd:brand"],"computed_at":"2026-10-17T05:46:00Z"},"pay":null,"html_url":"https://alion.io/job/hp-inc-asic-design-engineer","json_url":"https://alion.io/job/hp-inc-asic-design-engineer.json","meta":{"generated_at":"2026-10-18T13:42:20Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":20334,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-19T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":72},"rest":"https://alion.io/mcp/rest/get_company?id=72"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fhp-inc-asic-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fhp-inc-asic-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fhp-inc-asic-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/hp-inc-asic-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fhp-inc-asic-design-engineer"}]}