{"id":1322045,"url":"https://alion.io/job/infineon-technologies-noc-ip-digital-design-engineer","title":"NOC IP Digital Design Engineer","company":{"id":51757,"name":"Infineon Technologies","domain":"infineon.com","url":"https://alion.io/company/infineon-technologies","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Eightfold","truth_index":{"grade":"B","score":81,"open_postings":216,"ghost_share":0,"stale_share":0.741,"repost_share":0,"time_to_fill_p50_days":52,"computed_at":"2026-10-20T05:45:00Z"}},"role":"Networking","role_family":"Networking","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":17500,"max_usd":42000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":648},"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Xcelium","optional":false},{"name":"Microsoft Office","optional":false},{"name":"Siemens ModelSim","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"Windows","optional":false}],"status":"live","first_seen_at":"2026-06-08T07:00:46Z","employer_posted_date":"2026-08-19","last_verified_at":"2026-10-20T16:26:03Z","board_verified":true,"closed_at":null,"days_open":134,"trust":{"level":"ok","repost_count":0,"flags":[],"days_open":133},"description":"Join a high-impact team developing next-generation automotive SoCs. Contribute to NoC IP integration, RTL design, connectivity validation, and automation, while collaborating with architecture, verification, and integration teams to deliver robust, high-quality silicon solutions. Ideal for engineers passionate about digital design, debugging, and chip-level integration.\nYour role\nKey responsibilities in your new role\nSupport NoC IP microarchitecture, RTL integration, and configuration activities under the guidance of senior engineers\nContribute to NoC design implementation, connectivity checks, and quality validation for automotive SoCs\nParticipate in design reviews and work closely with architecture, integration, and verification teams\nDebug RTL and connectivity issues, support status reporting, and help close design quality gaps\nWork on automation and scripting improvements to enhance team productivity and design efficiency\nHelp define and validate chip-level connectivity and integration concepts for automotive microcontroller products\nLearn and apply best practices in digital design, integration, and design methodology across project teams\nYour profile\nQualifications and skills to help you succeed \nBachelor's/Master's degree in Electrical/ Electronic Engineering or a related discipline\n5 to 7 years of industry experience in semiconductor product development and proven execution in digital RTL/SoC design or integration\nGood understanding of NoC micro architecture, RTL integration, and SoC connectivity concepts\nWorking knowledge of AMBA protocols such as AHB/AXI/APB and experience with interconnect-related design flows\nStrong fundamentals in digital design, RTL coding, simulation, debugging, and design quality checks\nExposure to SystemVerilog/Verilog and ASIC/SoC design methodologies\nAbility to work effectively in a global, fast-paced team with good communication and collaboration skills\nExperience in UNIX/Windows environments, MS Office tools, and version control systems such as GIT Bachelor's/Master's degree in Electrical/ Electronic Engineering or a related discipline\n5 to 7 years of industry experience in semiconductor product development and proven execution in digital RTL/SoC design or integration\nGood understanding of NoC micro architecture, RTL integration, and SoC connectivity concepts\nWorking knowledge of AMBA protocols such as AHB/AXI/APB and experience with interconnect-related design flows\nStrong fundamentals in digital design, RTL coding, simulation, debugging, and design quality checks\nExposure to SystemVerilog/ Verilog and ASIC/SoC design methodologies\nAbility to work effectively in a global, fast-paced team with good communication and collaboration skills\nExperience in UNIX/Windows environments, MS Office tools, and version control systems such as GIT \nExposure to architecture feasibility analysis,integration trade-offs, and design reviews\n\nUnderstanding of RTL implementation flows, debugtechniques, and connectivity clean-up activities\n\nFamiliarity with simulation tools such asVCS/Xcelium/ModelSim and design verification workflows\n\nA proactive attitude toward learning, problemsolving, and improving design automation\n\nBasic to intermediate experience in NoC design andintegration, including multi-clock and multi-power domains\n\n#WeAreIn for driving decarbonization and digitalization.\nAs a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener.\nAre you in?\nWe are on a journey to create the best Infineon for everyone.\nWe strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity.\nOur hiring decisions are based on skills and experience. Even if you don’t meet every requirement, we encourage you to apply.\nPlease let your recruiter know if you need any accommodations during the interview process.\nLearn more about our various contact channels and about Diversity & Inclusion at Infineon.","description_format":"text","description_chars":4330,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":[],"lifecycle":[{"event":"open","at":"2026-09-26T21:59:02Z"}],"visa":[],"liveness":{"score":14,"band":"cold","label":"Long shot","p_open":1,"p_active":0.388,"p_room":0.35,"age_days":133,"expected_fill_days":52,"reasons":["conf:2","stale_co","velocity","win:tail","comp:brand"],"computed_at":"2026-10-20T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/infineon-technologies-noc-ip-digital-design-engineer","json_url":"https://alion.io/job/infineon-technologies-noc-ip-digital-design-engineer.json","meta":{"generated_at":"2026-10-20T18:26:26Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":21234,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-21T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":51757},"rest":"https://alion.io/mcp/rest/get_company?id=51757"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Finfineon-technologies-noc-ip-digital-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Finfineon-technologies-noc-ip-digital-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Finfineon-technologies-noc-ip-digital-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/infineon-technologies-noc-ip-digital-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Finfineon-technologies-noc-ip-digital-design-engineer"}]}