{"id":1322012,"url":"https://alion.io/job/infineon-technologies-senior-engineer-digital-concept-engineering-fmdiv","title":"Senior Engineer Digital Concept Engineering (f/m/div)","company":{"id":51757,"name":"Infineon Technologies","domain":"infineon.com","url":"https://alion.io/company/infineon-technologies","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Eightfold","truth_index":{"grade":"B","score":81,"open_postings":216,"ghost_share":0,"stale_share":0.741,"repost_share":0,"time_to_fill_p50_days":52,"computed_at":"2026-10-20T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Munich, Germany"],"countries":["DE"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":82000,"max_usd":149000,"period":"year","method":"role_seniority_country_cell","sample_n":8},"experience_years_min":3,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Agile","optional":false},{"name":"Formal Verification","optional":false},{"name":"Jira","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"VHDL","optional":false},{"name":"CI/CD","optional":true},{"name":"Git","optional":true}],"status":"live","first_seen_at":"2026-08-18T13:00:13Z","employer_posted_date":"2026-08-25","last_verified_at":"2026-10-20T03:09:15Z","board_verified":true,"closed_at":null,"days_open":62,"trust":{"level":"ok","repost_count":1,"flags":[],"days_open":62},"description":"#WeAreIn for jobs that impact everyone's life.\nWhat if your ideas could change the way the world connects, powers up, or thinks?\nAs a Senior Engineer Digital Concept Engineering (f/m/div) on our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life.\nAre you in?\nYour role\nKey responsibilities in your new role\nThe position can be filled in Munich or Cork.\nLead the PORT IP concept development, defining functional specifications, architectural constraints, design guidelines, and the roadmap across product families, including PPA\ntrade-offs and feasibility studies\n\nOwn the microcontroller and PORT IP\narchitecture, ensuring scalability, power efficiency, and performance, while driving functional safety compliance (ISO 26262 up to ASIL-D) through safety mechanisms, safe I/O states, FMEDA contributions, and diagnostic coverage targets\n\nDrive the digital design, verification,\nand low-power strategy, implementing methodologies for robustness, early\nerror detection, and high verification coverage, while defining CDC/RDC\nstrategies, power domains, isolation, retention, and UPF/CPF concepts\n\nOwn the safe and robust I/O architecture, including pin multiplexing, alternate-function architecture, pad control,\ndrive strength, and slew-rate configuration, and coordinate digital-analog\nintegration with analog/pad IP and interconnect teams\n\nAutomate design and engineering processes\nwith Python, developing solutions for design flows, simulation, data\nanalysis, reporting, and automated generation of register maps, documentation,\nand verification models from a single source (e.g., IP-XACT/SystemRDL)\n\nManage engineering workflows and drive\ncross-functional collaboration, using Jira for backlog management,\nmilestone tracking, and risk communication, while working closely with RTL\ndesign, verification, firmware, and system engineering teams\n\nAct as a technical expert and mentor, establishing best practices for concept engineering and scripting while influencing technical direction and engineering excellence across teams\n\nYour profile\nQualifications and skills to help you succeed \nA degree in Electrical Engineering, Computer Science, or related technical field\nAt least 3-5 yearsin digital IC design, concept engineering, or related semiconductorroles · Strong understanding of Digital Design and Verification(e.g., UVM, formal verification); proficiency in SystemVerilog (and VHDL); familiarity with industry EDA flows(e.g., Synopsys, Cadence, Siemens) and formal verification tools\n\nDeep knowledge of Microcontroller Architectureand IP integration; understanding of I/O/pad-cell design(drive strength, slew rate, level shifting, pull configuration) and pin multiplexing; experience with PORT IPor similar high-volume digital IP platformsis highly advantageous\n\nProficient in Python scriptingfor automation tool developmentand data processing; hands-on with Jirafor project managementand agile workflows; strong analytical problem-solving, excellent communication, and proactivemindset\n\nWorking knowledge of functional safety (ISO 26262)and safety-relevant IP design including safety mechanismsand FMEDAconcepts; Nice-to-have:DFT(boundary scan JTAG/IEEE 1149.1), register-automation flows (IP-XACT/SystemRDL), Git-based CI/CD, low-powerintent (UPF/CPF), CDC/RDCmethodology\n\nFluent in Englishlanguage skills, Germanis a plus\n\n#WeAreIn for driving decarbonization and digitalization.\nAs a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener.\nAre you in?\nWe are on a journey to create the best Infineon for everyone.\nWe strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity.\nOur hiring decisions are based on skills and experience. Even if you don’t meet every requirement, we encourage you to apply.\nPlease let your recruiter know if you need any accommodations during the interview process.\nLearn more about our various contact channels and about Diversity & Inclusion at Infineon.\nAlexander Greie\nLinkedIn Profile","description_format":"text","description_chars":4550,"description_truncated":false,"requirements":{"experience_years_min":3,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Analog & Power Semiconductors"],"lifecycle":[{"event":"open","at":"2026-09-26T21:59:02Z"},{"event":"close","at":"2026-10-08T01:04:20Z"},{"event":"reopen","at":"2026-10-10T03:39:34Z"}],"visa":[],"liveness":{"score":28,"band":"fade","label":"Fading","p_open":1,"p_active":0.506,"p_room":0.55,"age_days":62,"expected_fill_days":52,"reasons":["conf:2","stale_co","velocity","win:tail","comp:brand"],"computed_at":"2026-10-20T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/infineon-technologies-senior-engineer-digital-concept-engineering-fmdiv","json_url":"https://alion.io/job/infineon-technologies-senior-engineer-digital-concept-engineering-fmdiv.json","meta":{"generated_at":"2026-10-20T06:26:33Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":6990,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-21T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":51757},"rest":"https://alion.io/mcp/rest/get_company?id=51757"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Finfineon-technologies-senior-engineer-digital-concept-engineering-fmdiv"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Finfineon-technologies-senior-engineer-digital-concept-engineering-fmdiv"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Finfineon-technologies-senior-engineer-digital-concept-engineering-fmdiv"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/infineon-technologies-senior-engineer-digital-concept-engineering-fmdiv\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Finfineon-technologies-senior-engineer-digital-concept-engineering-fmdiv"}]}