{"id":4279851,"url":"https://alion.io/job/info-way-solutions-design-verification-engineer","title":"Design Verification Engineer","company":{"id":4442359,"name":"Info Way Solutions","domain":"infowaygroup.com","url":"https://alion.io/company/info-way-solutions","size_band":null,"is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":null,"truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"middle","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"explicit","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":3,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"Perl","optional":true},{"name":"Python","optional":true},{"name":"UVM","optional":true}],"status":"live","first_seen_at":"2026-11-13T17:20:09Z","employer_posted_date":null,"last_verified_at":"2026-11-13T17:20:09Z","board_verified":false,"closed_at":null,"days_open":0,"trust":{"level":"not_scored","repost_count":null,"flags":[],"days_open":0},"description":"Job Description – VLSI Design Engineer\n\nJob Location: Bengaluru, Karnataka, India\nExperience: 3–8 Years\nEmployment Type: Full-Time\nIndustry: IT Services / Semiconductor Engineering\n\nJob Overview\nAccenture is looking for skilled VLSI Design Engineers to join its semiconductor engineering team in Bengaluru. The candidate will be responsible for designing, developing, verifying, and optimizing integrated circuits (ICs) for advanced semiconductor and SoC applications.\n\nKey Responsibilities\nDevelop and implement RTL designs using Verilog and SystemVerilog.\nWork on ASIC and SoC design and development.\nPerform RTL coding, simulation, debugging, and functional verification.\nSupport synthesis, timing analysis, and design optimization.\nCollaborate with physical design, verification, and hardware engineering teams.\nAnalyze design specifications and ensure compliance with functional requirements.\nIdentify and resolve design issues throughout the chip development lifecycle.\nContribute to power, performance, and area (PPA) optimization.\n\nRequired Skills\nStrong understanding of VLSI design fundamentals.\nHands-on experience with Verilog and SystemVerilog.\nKnowledge of ASIC/SoC design methodologies.\nExperience in RTL design and simulation.\nUnderstanding of synthesis and Static Timing Analysis (STA).\nFamiliarity with EDA tools such as Synopsys, Cadence, or Siemens EDA.\nKnowledge of digital electronics and CMOS fundamentals.\n\nPreferred Skills\nExperience with FPGA design.\nKnowledge of UVM-based verification.\nUnderstanding of physical design and DFT concepts.\nScripting experience in Python, Perl, or Tcl.\n\nEducational Qualifications\nBachelor's or Master's degree in Electronics and Communication Engineering (ECE), Electrical Engineering, VLSI, or a related discipline.\n\nKeywords\nVLSI, ASIC, RTL Design, Verilog, SystemVerilog, SoC, Semiconductor, CMOS, FPGA, UVM, DFT, Synthesis, STA, Synopsys, Cadence, Physical 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