{"id":76201,"url":"https://alion.io/job/intel-corporation-atom-cpu-layout-design-engineer","title":"Atom CPU Layout Design Engineer","company":{"id":35,"name":"Intel Corporation","domain":"intel.com","url":"https://alion.io/company/intel","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":83,"open_postings":72,"ghost_share":0,"stale_share":0.639,"repost_share":0.042,"time_to_fill_p50_days":29,"computed_at":"2026-10-10T05:45:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"junior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Zapopan, Mexico"],"countries":["MX"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":51000,"max_usd":126000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":613},"experience_years_min":1,"visa_sponsorship":true,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Linux","optional":true},{"name":"Unix","optional":true}],"status":"live","first_seen_at":"2026-05-14T00:00:00Z","employer_posted_date":"2026-10-05","last_verified_at":"2026-10-11T00:42:47Z","board_verified":true,"closed_at":null,"days_open":150,"trust":{"level":"stale","repost_count":1,"flags":["stale"],"days_open":149},"description":"Job Details:\nJob Description:\nThis position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be required to be considered for this position.\nAs an Atom CPU Layout Design Engineer, you will be part of a highly skilled team responsible for the design of future-generation, high-performance Intel Atom microprocessors. In this role, you will drive the physical implementation of a variety of memory compilers, custom IP blocks, and layout partitions that directly support Intel’s CPU products.\nYou will work in a dynamic environment where design challenges are complex, assignments are broadly defined, and solutions often require creativity, deep technical knowledge, and strong problem-solving skills.\nYour responsibilities will include, but will not be limited to:\nEnsuring all physical design implementations follow best-in-class layout methodologies and deliver highly efficient, high-quality results.\nIndependently performing and driving complex physical design assignments across multiple design stages.\nWorking closely with circuit design engineers to interpret schematics and translate them into optimized physical layouts.\nContributing across the full design flow-from leaf-level cell layout to block-level and top-level integration.\nPartnering with SoC teams and cross-site design groups to ensure alignment, reuse, and consistency across projects.\nDeveloping or enhancing layout scripts, macros, and automation solutions to improve productivity and design robustness (a strong plus).\nThe ideal candidate should exhibit the following behavioral traits:\nExcellent communication and interpersonal skills.\nPrioritization and multitasking skills.\nGood analytical and problem-solving skills.\nQualifications:\nMinimum Qualifications, are required to be initially considered for this position:\nBachelor's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, or a related field.\n6+ months of experience in layout design.\nAdvanced English level.\nMust have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship).\nPreferred Qualifications, are in addition to the minimum requirements and are considered a plus factor in identifying top candidates:\nMaster's degree in electronic/Microelectronic Engineering, Computer Engineering, or a related engineering discipline.\n1+ year of experience or familiarity with Very Large Scale of Integration (VLSI) and Complementary Metal-Oxide-Semiconductor (CMOS) logic circuit design.\n1+ year of knowledge in Unix/Linux operating systems.\nRequirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.\nJob Type:\nExperienced HireShift:\nShift 1 (Mexico)Primary Location:\nMexico, GuadalajaraAdditional Locations:\nPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust\nN/AWork Model for this Role\nThis role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.*\nADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.","description_format":"text","description_chars":4007,"description_truncated":false,"requirements":{"experience_years_min":1,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[{"language":"English","level":"Advanced (C1)","optional":false}]},"benefits":[],"hiring_locations":[{"name":"Mexico","iso":"MX","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Semiconductor Manufacturing","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-05-14T00:00:00Z"},{"event":"close","at":"2026-08-29T12:04:05Z"},{"event":"reopen","at":"2026-10-05T18:40:50Z"}],"visa":[],"liveness":{"score":3,"band":"cold","label":"Long shot","p_open":1,"p_active":0.122,"p_room":0.28,"age_days":149,"expected_fill_days":29,"reasons":["conf:1","stale_co","velocity","win:tail","crowd:junior,brand"],"computed_at":"2026-10-10T05:45:15Z"},"pay":null,"html_url":"https://alion.io/job/intel-corporation-atom-cpu-layout-design-engineer","json_url":"https://alion.io/job/intel-corporation-atom-cpu-layout-design-engineer.json","meta":{"generated_at":"2026-10-11T04:03:06Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler","counted_by":"address","units_charged":1,"used_today":2361,"day_limit":5000,"remaining_today":2639,"minute_limit":60,"resets_at":"2026-10-12T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":35},"rest":"https://alion.io/mcp/rest/get_company?id=35"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fintel-corporation-atom-cpu-layout-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fintel-corporation-atom-cpu-layout-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fintel-corporation-atom-cpu-layout-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/intel-corporation-atom-cpu-layout-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fintel-corporation-atom-cpu-layout-design-engineer"}]}