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Salary
≈ $16k – $38k per year (Estimated)
Location
Hybrid (George Town, Malaysia)
Employment
Full-Time

Confirmed on the employer's own hiring board on Oct 3, 2026. First seen by Alion on Oct 2, 2026. Intel Corporation scores B on the Alion truth index.

Overview
Company
Impact
Profile match
Intel is an American semiconductor company founded in 1968 by Robert Noyce and Gordon Moore and headquartered in Santa Clara, California. It created the x86 instruction set that still underpins most personal computers and servers, and designs and manufactures processors, chipsets, discrete graphics, networking silicon and AI accelerators. Unlike most of its competitors the company owns its fabrication plants, and it is investing heavily in Intel Foundry to manufacture chips for external customers while rebuilding its process technology leadership.

Job Details:

Job Description:

The Role and Impact

As a Physical Design Engineer, you will play a key role in implementing and verifying complex structural physical designs for Intel's next-generation Client CPU System-on-Chip (SoC). Your work will involve tasks such as synthesis, floor planning, power-grid designs, place-and-route, and timing analysis. This role is instrumental in ensuring the delivery of advanced SoC designs using cutting-edge process technologies in the era of hyperscale computing.

Business Group

You will join the Silicon and Platform Engineering Group (SPE), a global team responsible for designing and delivering leading-edge silicon solutions. The group plays a pivotal role in enabling Intel's leadership in semiconductor technology by innovating advanced design processes and methodologies that form the foundation of Intel's product excellence.

Key Responsibilities

- Implement structural physical designs, including synthesis, floor planning, power-grid, and clock tree designs.

- Perform place-and-route (PnR), static timing analysis (STA), timing budgeting, and closure.

- Conduct RC extraction, design-for-manufacturability (DFM) analysis, and design rule check (DRC) clean-up.

- Verify physical designs using functional equivalency verification (FEV), timing/performance verification (PV), signal integrity/noise analysis, layout design rules verification (LV), and reliability verification (RV).

- Optimize power usage and ensure convergence during the design process.

- Collaborate with cross-functional teams to define structural design methodologies and develop innovative design flows.

Qualifications:

Minimum Qualifications

- Bachelor's degree in Electronic, Electrical, or Computer Engineering or equivalent with 0-1 years of hands-on experience in physical design, showcasing skills developed through internships, academic projects, coursework, or hands-on training.

- OR Master's degree in Electronic, Electrical, or Computer Engineering or equivalent with no prior professional experience.

- Proficiency in industrial Electronic Design Automation (EDA) tools, including tools for synthesis, place-and-route, and timing analysis.

- Demonstrated knowledge of physical design processes such as DFM, STA, RC extraction, DRC clean-up, and power-grid optimization.

Preferred Qualifications

- Familiarity with advanced semiconductor process technologies.

- Strong analytical and problem-solving skills to address design challenges.

- Effective communication and collaboration abilities to work within cross-functional teams.

Join our innovative team and contribute to the cutting-edge technologies driving the future of hyperscale computing and CPU designs. Make an impact through your skills, creativity, and passion for evolving semiconductor solutions.

Job Type:

College Grad

Shift:

Shift 1 (Malaysia)

Primary Location:

Malaysia, Penang

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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