{"id":1697200,"url":"https://alion.io/job/intel-corporation-cpu-soc-structural-design-engineer","title":"CPU-SoC Structural Design Engineer","company":{"id":35,"name":"Intel Corporation","domain":"intel.com","url":"https://alion.io/company/intel","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":84,"open_postings":64,"ghost_share":0,"stale_share":0.625,"repost_share":0.031,"time_to_fill_p50_days":29,"computed_at":"2026-10-06T05:45:30Z"}},"role":"Hardware","role_family":"Hardware","seniority":"junior","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["George Town, Malaysia"],"countries":["MY"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":16000,"max_usd":39000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":524},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Platform Engineering","optional":false}],"status":"live","first_seen_at":"2026-10-02T12:27:19Z","employer_posted_date":"2026-10-02","last_verified_at":"2026-10-06T19:25:50Z","board_verified":true,"closed_at":null,"days_open":4,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":4},"description":"Job Details:\nJob Description:\nThe Role and ImpactAs a Physical Design Engineer, you will play a key role in implementing and verifying complex structural physical designs for Intel's next-generation Client CPU System-on-Chip (SoC). Your work will involve tasks such as synthesis, floor planning, power-grid designs, place-and-route, and timing analysis. This role is instrumental in ensuring the delivery of advanced SoC designs using cutting-edge process technologies in the era of hyperscale computing.\nBusiness Group\nYou will join the Silicon and Platform Engineering Group (SPE), a global team responsible for designing and delivering leading-edge silicon solutions. The group plays a pivotal role in enabling Intel's leadership in semiconductor technology by innovating advanced design processes and methodologies that form the foundation of Intel's product excellence.\nKey Responsibilities\n- Implement structural physical designs, including synthesis, floor planning, power-grid, and clock tree designs.\n- Perform place-and-route (PnR), static timing analysis (STA), timing budgeting, and closure.\n- Conduct RC extraction, design-for-manufacturability (DFM) analysis, and design rule check (DRC) clean-up.\n- Verify physical designs using functional equivalency verification (FEV), timing/performance verification (PV), signal integrity/noise analysis, layout design rules verification (LV), and reliability verification (RV).\n- Optimize power usage and ensure convergence during the design process.\n- Collaborate with cross-functional teams to define structural design methodologies and develop innovative design flows.\nQualifications:\nMinimum Qualifications- Bachelor's degree in Electronic, Electrical, or Computer Engineering or equivalent with 0-1 years of hands-on experience in physical design, showcasing skills developed through internships, academic projects, coursework, or hands-on training.\n- OR Master's degree in Electronic, Electrical, or Computer Engineering or equivalent with no prior professional experience.\n- Proficiency in industrial Electronic Design Automation (EDA) tools, including tools for synthesis, place-and-route, and timing analysis.\n- Demonstrated knowledge of physical design processes such as DFM, STA, RC extraction, DRC clean-up, and power-grid optimization.\nPreferred Qualifications\n- Familiarity with advanced semiconductor process technologies.\n- Strong analytical and problem-solving skills to address design challenges.\n- Effective communication and collaboration abilities to work within cross-functional teams.\nJoin our innovative team and contribute to the cutting-edge technologies driving the future of hyperscale computing and CPU designs. Make an impact through your skills, creativity, and passion for evolving semiconductor solutions.\nJob Type:\nCollege GradShift:\nShift 1 (Malaysia)Primary Location:\nMalaysia, PenangAdditional Locations:\nPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust\nN/AWork Model for this Role\nThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*\nADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. 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