{"id":961115,"url":"https://alion.io/job/intel-corporation-gpu-design-verification-engineer-2","title":"GPU Design Verification Engineer","company":{"id":35,"name":"Intel","domain":"intel.com","url":"https://alion.io/company/intel","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":84,"open_postings":103,"ghost_share":0.029,"stale_share":0.553,"repost_share":0.058,"time_to_fill_p50_days":30,"computed_at":"2026-11-08T05:47:12Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":22000,"max_usd":59000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":18},"experience_years_min":6,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-09-16T10:09:49Z","employer_posted_date":"2026-09-16","last_verified_at":"2026-11-08T12:06:11Z","board_verified":true,"closed_at":null,"days_open":53,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":53},"description":"Job Details:\nJob Description:\nPerforms functional verification of graphics logic components, including 3D graphics, media, and display, to ensure design will meet specification requirements.\nDefines and develops scalable and reusable IP verification plans, test benches, and architecture for verification environment to ensure coverage to confirm to graphics microarchitecture specifications.\nExecutes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.\nReplicates, root causes, and debugs issues in the presilicon environment.\nFinds and implements corrective measures to resolve failing tests. Collaborates with GPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals.\nDocuments test plans and drives technical reviews of plans and proofs with design and architecture teams.\nMaintains and improves existing functional verification infrastructure and methodology. Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.\nQualifications:\nBachelor / Masters degree in Electronics or Computer Engineering with 6+ years experience in silicon design development.\nWell versed with Verilog / System Verilog / UVM.\nExperience in Pre-silicon verification, Testplan, testbench, Coverage/Assertion writing and closure.\nExposure to CPU or GPU Architecture (Computer Architecture Knowledge)Debug Experience with industry standard frontend design and verification flows, tools and methodology Programming / scripting languages like Python, Perl, or Shell scripting automation methods.\nGood verbal/written communication skills.\nEffective team player with continuous learning mindset.\nBe willing to balance multiple tasks. Prior experience in IP development teams would be an added advantage.\nExperience in IP coverage and functional verification.\nJob Type:\nExperienced HireShift:\nShift 1 (India)Primary Location:\nIndia, BangaloreAdditional Locations:\nPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust\nN/AWork Model for this Role\nThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*\nADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. 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