{"id":2284410,"url":"https://alion.io/job/intel-corporation-intel-foundry-principal-engineer-overlay-development-engineer-lithography","title":"Intel Foundry Principal Engineer Overlay Development Engineer - Lithography","company":{"id":35,"name":"Intel","domain":"intel.com","url":"https://alion.io/company/intel","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":83,"open_postings":104,"ghost_share":0.019,"stale_share":0.596,"repost_share":0.038,"time_to_fill_p50_days":27,"computed_at":"2026-10-21T05:46:15Z"}},"role":"Backend","role_family":"Backend","seniority":"lead","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Hillsboro, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":160000,"max_usd":321000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":1150},"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Design of Experiments","optional":false},{"name":"Photolithography","optional":false},{"name":"Statistical Process Control","optional":false},{"name":"EUV","optional":true}],"status":"live","first_seen_at":"2026-10-07T00:00:00Z","employer_posted_date":"2026-10-07","last_verified_at":"2026-10-21T16:05:53Z","board_verified":true,"closed_at":null,"days_open":14,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":14},"description":"Job Details:\nJob Description:\nAbout the Team\nLogic Technology Development (LTD) is Intel Foundry's advanced technology engine, responsible for inventing, developing, and industrializing the process technologies that power future semiconductor products. From breakthrough device architectures and materials innovation to production-ready manufacturing solutions, LTD transforms research into customer-ready technologies that enable industry-leading performance at scale.\nAbout the Role\nThe Lithography Overlay Principal Engineer is responsible for overlay control innovation, defining key technology roadmaps, and leading complex technical projects to establish Intel's overlay leadership.\nAs a lithography overlay expert and technologist, you will be responsible for customization and addition of new features to base technologies to use in high volume manufacturing. Your expertise will focus on all aspects of improving overlay control.\nResponsibilities:\nLTD Principal Engineers are responsible for leading scientific research enabling the manufacture of innovative device architectures but not limited to:\nLead scientific research enabling the manufacture of innovative device architectures coupled with the realization of these architectures.\nDesigning, executing, and analyzing experiments necessary to meet engineering specifications for their process.\nParticipate in the development of intellectual property.\nIntegrate the many individual steps necessary for the manufacture of complex microprocessors.\nRamp to manufacturing volumes to demonstrate the technology meets requirements while simultaneously transferring the technology to counterparts in manufacturing via the Copy Exactly Methodology. \nProvide technical guidance and mentorship to junior engineers and researchers, fostering a culture of continuous learning and development.\nDrive the development and implementation of customized, cost-effective, competitive, overlay solutions, ensuring compatibility with Intel's existing manufacturing processes and platforms.\nProvide technical guidance and mentorship to junior engineers and researchers, fostering a culture of continuous learning and development.\nStay updated with industry trends, emerging technologies, and customer needs to inform customization strategies and identify opportunities for improvement.\nRequired Skills and Experience\nDeep experience in lithography\nBroad experience in logic technology development, enhancement, and customization\nCurrent experience in advanced node overlay development processes.\nProven ability to troubleshoot process impacts on overlay mark performance.\nExperience with integrated process development to co-optimize process flows and overlay mark design.\nDemonstrated proficiency in Design of Experiments (DOE), Statistical Process Control (SPC), and data analysis.\nLeadership skills with the ability to lead cross-functional teams and drive collaboration.\nCommunication skills, both verbal and written, with the ability to convey complex technical concepts effectively.\nPreferred Skills and Experience\nExperience driving integrated process change methodologies based on overlay impact analysis.\nDirect overlay equipment development experience and vendor engagement.\nHands-on experience with ASML EUV and DUV scanner platforms.\nStrong capability to troubleshoot complex process and production issues at advanced nodes.\nDeep working knowledge of lithography equipment operation, including automation and process control systems.\nFamiliarity with factory automation or manufacturing execution and control systems.\nQualifications:\nDegree in in Materials Science, Chemical Engineering, Chemistry, Physics, Mechanical Engineering, Electrical Engineering, or a related STEM discipline.\nBachelor's degree with 12+ years, Master's degree with 10+ years, or Ph.D. with 7+ years of experience.\n7+ years of hands-on lithography experience.\nJob Type:\nExperienced HireShift:\nShift 1 (United States of America)Primary Location:\nUS, Oregon, HillsboroAdditional Locations:\nPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust\nThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.Benefits\nWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.\nAnnual Salary Range for jobs which could be performed in the US: $211,400.00-298,440.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role\nThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*\nADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. 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