{"id":1017273,"url":"https://alion.io/job/intel-corporation-senior-siph-product-development-engineer","title":"Senior SiPh Product Development Engineer","company":{"id":35,"name":"Intel","domain":"intel.com","url":"https://alion.io/company/intel","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":84,"open_postings":124,"ghost_share":0.024,"stale_share":0.556,"repost_share":0.04,"time_to_fill_p50_days":24,"computed_at":"2026-10-22T06:10:10Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Chandler, United States","Albuquerque, United States","Santa Clara, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":129000,"max_usd":236000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":1396},"experience_years_min":6,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[],"status":"live","first_seen_at":"2026-09-17T00:00:00Z","employer_posted_date":"2026-09-17","last_verified_at":"2026-10-22T00:12:41Z","board_verified":true,"closed_at":null,"days_open":35,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":35},"description":"Job Details:\nJob Description:\nIntel's Integrated Photonics Solutions (IPS) organization is driving the future of high-performance computing and networking through the development of advanced optical interconnect technologies built on Intel's silicon photonics platform.\nPosition Overview\nLead the development and industrialization of next-generation silicon photonics and high-speed optical products from concept through high-volume manufacturing. Drive technical execution, manufacturing readiness, and cross-functional decision-making to deliver products that meet performance, quality, cost, and schedule objectives.\nKey Responsibilities\nLead matrixed teams across design, fab, assembly, test, quality, and operations to define and execute the product Plan of Record (POR).\nDrive end-to-end development of Photonic ICs (PICs), Electronic ICs (EICs), and manufacturing process technologies from concept through production ramp.\nBalance technical tradeoffs, business priorities, cost, schedule, and risk to enable informed decision-making and successful product execution.\nIdentify and mitigate technical and execution risks through contingency planning and cross-functional alignment.\nDrive manufacturing readiness, including wafer-start planning, qualification strategy, capacity analysis, customer sampling, and assembly/test site certification.\nServe as the primary interface to stakeholders and leadership, providing clear communication of product status, risks, and recommendations.\nBuild strong partnerships across organizations to accelerate execution and deliver business results.\nInterface with fab, optical design, hardware, firmware, IC design, test, operations, and quality teams to ensure successful product development and manufacturing ramp.\nWhat We're Looking For\nYou should demonstrate the following professional traits to be successful:\nStrong collaborative leadership to effectively guide cross-functional, matrixed engineering and operational teams.\nAnalytical decision-making to balance complex technical tradeoffs with business priorities, costs, and schedule constraints.\nProactive communication and stakeholder management to clearly convey product status, risks, and recommendations to leadership.\nQualifications:\nMinimum Qualifications\nBS in Physics, Electrical Engineering, Optical Engineering, or a related discipline with 6+ years of relevant industry experience, or a Master's degree with 4+ years of relevant industry experience. • 3+ years of experience in one or more of the following: • High-speed optical component or product development\nSilicon photonics development • Semiconductor fabrication process development • Wafer-level assembly or packaging development • Test development and validation\nPreferred Qualifications\nExperience in silicon photonics, optical transceivers, or semiconductor product development, plus 2 or more of the following skills:\n3+ years of semiconductor fab process experience\n3+ years of assembly, packaging, or manufacturing process experience\nProven track record of leading cross-functional engineering teams and successfully transitioning products from development to high-volume manufacturing\nJoin us in shaping the future of technology by bringing your expertise and passion to Intel's Silicon Photonic Design team.\nJob Type:\nExperienced HireShift:\nShift 1 (United States of America)Primary Location:\nUS, Arizona, PhoenixAdditional Locations:\nUS, California, Santa Clara, US, New Mexico, AlbuquerquePosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust\nN/ABenefits\nWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.\nAnnual Salary Range for jobs which could be performed in the US: $164,470.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role\nThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*\nADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. 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