{"id":947317,"url":"https://alion.io/job/intel-corporation-system-technology-research-engineer-phd-intern-2","title":"System Technology Research Engineer - (PhD Intern)","company":{"id":35,"name":"Intel","domain":"intel.com","url":"https://alion.io/company/intel","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":84,"open_postings":100,"ghost_share":0.02,"stale_share":0.58,"repost_share":0.04,"time_to_fill_p50_days":27,"computed_at":"2026-10-17T05:46:00Z"}},"role":"DevOps","role_family":"DevOps","seniority":"intern","employment_type":"internship","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Hillsboro, United States","Santa Clara, United States","Austin, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":1,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Agile","optional":false},{"name":"Cadence Virtuoso","optional":true},{"name":"Python","optional":true},{"name":"Synopsys Fusion Compiler","optional":true}],"status":"live","first_seen_at":"2026-09-14T00:00:00Z","employer_posted_date":"2026-09-14","last_verified_at":"2026-10-18T00:42:39Z","board_verified":true,"closed_at":null,"days_open":34,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":34},"description":"Job Details:\nJob Description:\nAre you a top-tier university student eager to dive into the world of semiconductor innovation? Intel's Foundry System Technology team is seeking a talented intern to help us push the boundaries of semiconductor and packaging manufacturing technologies.\nOur team is dedicated to advancing Moore's Law, exploring new product opportunities, and leading industry-defining packaging development through System Technology Co-optimisation (STCO).\nPosition Overview: As a Research Engineer Intern, you will play a crucial role in developing STCO methodology and evaluating 3D/2.5D dis-aggregation schemes using solder microbumps or hybrid bonding for memory and logic stacking across different product architectures. This internship offers a unique opportunity to work on pioneering technologies and contribute to Intel's semiconductor processing and packaging roadmap.\nWhat You'll Do:\nDevelop and enhance STCO methodologies.\nPerform system-level evaluations of novel devices, interconnects, patterning, materials, systems, and integration schemes.\nCollaborate with diverse teams to drive innovation across various applications.\nWho We're Looking For:\nDriven and Motivated; a self-starter who thrives in a dynamic environment and is committed to delivering high-quality results.\nAnalytical and Problem-Solving Skills: Ability to tackle complex challenges with a strategic approach.\nOrganized and Efficient: Strong prioritization and time management skills to handle a fast-paced workflow.\nCollaborative and Team-Oriented: Excellent stakeholder management and teamwork ethics.\nFlexible and Adaptable: Comfortable working in an agile environment with a tolerance for ambiguity.\nStrong Communicator: Good interpersonal skills to facilitate effective collaboration and communication\nInternship Details: Minimum of 3 months during summer 2026, with potential for extension based on business needs.\nWhy Choose Intel?\nCollaborate with industry leaders and innovators.\nGain hands-on experience with cutting-edge technologies.\nContribute to projects that shape the future of semiconductor processing.\nIf you're ready to embark on a journey of innovation and discovery, apply now to join Intel's Foundry System Technology team. We look forward to welcoming you to a transformative internship experience\nQualifications:\nYou must possess the below requirements to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.\nKnowledge and/or experience listed below would be obtained through a combination of your schoolwork and/or classes and/or research and/or relevant previous job and/or internship experiences.\nMinimum Qualifications:\nActive Ph.D. candidacy in one of the following areas of study: Electrical Engineering, Electronics Engineering, Computer Architecture and Design or similar.\n1-2+ years research experience relevant to one or more of the following areas: System architecture modelling, digital circuit analysis and design, VLSI physical layout, electronic design automation, multi-physics modeling of electronic materials or systems.\nFamiliarity with IC design and physical layout tools such Cadence Virtuoso or Synopsis Fusion Compiler.\n Preferred Qualifications:\nSystem architecture design and modelling\nIC design, simulation, physical layout and tapeout experience.\nFamiliar with DRAM and SRAM circuit design and layout\nFamiliar with integrated circuits manufacturing flow and requirements\nFamiliar with different 2.5D and 3D packaging technologies\n3DIC design and simulation experience\nGood programming skills, preferably in Python.\nJob Type:\nStudent / InternShift:\nShift 1 (United States of America)Primary Location:\nUS, Oregon, HillsboroAdditional Locations:\nUS, California, Santa Clara, US, Texas, AustinPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust\nN/ABenefits\nWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.\nAnnual Salary Range for jobs which could be performed in the US: $141,998.00-142,002.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Our standard internship rates are based on your degree, location, and the job role. Your recruiter can share more about the specific compensation range for your preferred location and job role during the hiring process.Work Model for this Role\nThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*\nADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.","description_format":"text","description_chars":5726,"description_truncated":false,"requirements":{"experience_years_min":1,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"phd","optional":false},"security_clearance":false,"languages":[]},"benefits":["Hybrid work"],"hiring_locations":[{"name":"United States","iso":"US","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Semiconductor Manufacturing","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-09-15T21:36:18Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 2,014 · green card filings: 487","filings_12m":2014,"filings_prev_12m":3001,"green_card_filings_12m":487,"median_offered_wage_usd":134579,"route":null,"cap_exempt":false,"checked_at":"2026-10-15T11:24:14+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":461}],"liveness":{"score":17,"band":"cold","label":"Long shot","p_open":1,"p_active":0.389,"p_room":0.44,"age_days":33,"expected_fill_days":27,"reasons":["conf:34","stale_co","velocity","win:tail","crowd:junior,brand"],"computed_at":"2026-10-17T05:46:00Z"},"pay":null,"html_url":"https://alion.io/job/intel-corporation-system-technology-research-engineer-phd-intern-2","json_url":"https://alion.io/job/intel-corporation-system-technology-research-engineer-phd-intern-2.json","meta":{"generated_at":"2026-10-18T09:10:13Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":13645,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-19T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":35},"rest":"https://alion.io/mcp/rest/get_company?id=35"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fintel-corporation-system-technology-research-engineer-phd-intern-2"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fintel-corporation-system-technology-research-engineer-phd-intern-2"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fintel-corporation-system-technology-research-engineer-phd-intern-2"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/intel-corporation-system-technology-research-engineer-phd-intern-2\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fintel-corporation-system-technology-research-engineer-phd-intern-2"}]}