{"id":2986008,"url":"https://alion.io/job/intel-cpu-rtl-design-engineer","title":"CPU RTL Design Engineer","company":{"id":35,"name":"Intel","domain":"intel.com","url":"https://alion.io/company/intel","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"A","score":85,"open_postings":91,"ghost_share":0.033,"stale_share":0.505,"repost_share":0.044,"time_to_fill_p50_days":30,"computed_at":"2026-10-29T05:49:05Z"}},"role":"Hardware","role_family":"Hardware","seniority":"middle","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Chandler, United States","Austin, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":110000,"max_usd":213000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":609},"experience_years_min":3,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false}],"status":"closed","first_seen_at":"2026-10-15T00:00:00Z","employer_posted_date":"2026-10-15","last_verified_at":"2026-10-23T15:03:27Z","board_verified":false,"closed_at":"2026-10-23T15:03:27Z","days_open":8,"trust":{"level":"not_scored","repost_count":null,"flags":[],"days_open":8},"description":"Job Details:\nJob Description:\nThe Role\nJoin Intel's CPU design team and help develop the processors that power the next generation of computing.\nAs a CPU RTL Design Engineer, you will contribute to the logic design, microarchitecture, and RTL development of Intel processors. You will develop and optimize RTL, validate design functionality through simulation and debug, and work across architecture, verification, physical design, and SoC integration teams to deliver high-quality CPU designs.\nThis is an opportunity to solve complex engineering problems while building deeper expertise in CPU architecture, microarchitecture, digital logic design, SystemVerilog/Verilog, and power, performance, area, and timing optimization.\nWhat You’ll Do\nKey responsibilities will include but not limited to:\nDevelop and implement high-quality logic designs for CPU features, ensuring compliance with architecture and microarchitecture specifications.\nWrite and optimize RTL code to meet power, performance, area, and timing goals for physical design implementation.\nCollaborate with architecture teams to define and refine the microarchitectural features of the CPU.\nReview verification plans, analyze test results, and resolve failing RTL tests to ensure feature correctness.\nDocument microarchitectural specifications (MAS) for CPU designs.\nSupport system-on-chip (SoC) customers to ensure seamless integration of your CPU designs into larger systems.\nBehavioral traits that we are looking for:\nProblem solving: Uses structured analysis and engineering judgment to diagnose complex design and RTL issues.\nCollaboration: Works effectively with engineers across architecture, design, verification, physical design, and SoC integration.\nCommunication: Clearly communicates technical concepts, design decisions, tradeoffs, and issues to technical partners.\nLearning agility: Learns new architectures, methodologies, tools, and design concepts and applies them effectively.\nAttention to detail: Applies engineering rigor when implementing, reviewing, debugging, and documenting designs.\nContinuous improvement: Looks for opportunities to improve design quality, engineering efficiency, and development methodologies.\nIntel invests in our people and offers a complete and competitive package of benefits employees and their families through every stage of life.\nSee Intel Benefits for more details. \nQualifications:\nYou must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.\nNote:\nFor information on Intel’s immigration sponsorship guidelines, please see\nIntel U.S. Immigration Sponsorship Information\nMinimum Qualifications and Experience:\nBachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field with 3+ years of relevant experience; OR\nMaster's degree in the same filed with 1+ years of relevant experience; OR\nPhD in the same field 3+ months of educational experience.\nYour experience described above must be in the following:\nExperience with digital logic design and RTL development.\nExperience coding in SystemVerilog and/or Verilog.\nExperience with RTL simulation, functional validation, and/or debugging.\nExperience with architecture, microarchitecture, or digital design concepts,\nPreferred Qualifications and Experience:\nExperience developing or working from microarchitecture specifications.\nExperience working with design verification and debugging RTL failures.\nWhy Join This Team?\nBe part of a team developing next-generation CPU technology while expanding your expertise in RTL design and CPU microarchitecture. You’ll solve challenging engineering problems, take ownership of meaningful design work, and collaborate with experienced engineers across architecture, verification, physical design, and SoC integration. This is an opportunity to grow your technical capabilities while contributing to innovative processor designs that help shape the future of computing.\nJob Type:\nExperienced HireShift:\nShift 1 (United States of America)Primary Location:\nUS, Arizona, PhoenixAdditional Locations:\nUS, Texas, AustinPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust\nN/ABenefits\nWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.\nAnnual Salary Range for jobs which could be performed in the US: $105,650.00-200,340.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role\nThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*\nADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.","description_format":"text","description_chars":6340,"description_truncated":false,"requirements":{"experience_years_min":3,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["Hybrid work"],"hiring_locations":[{"name":"United States","iso":"US","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Semiconductor Manufacturing","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-21T08:25:14Z"},{"event":"close","at":"2026-10-23T15:03:27Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 2,014 · green card filings: 487","filings_12m":2014,"filings_prev_12m":3001,"green_card_filings_12m":487,"median_offered_wage_usd":134579,"route":null,"cap_exempt":false,"checked_at":"2026-10-29T16:27:21+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":728}],"liveness":null,"pay":null,"html_url":"https://alion.io/job/intel-cpu-rtl-design-engineer","json_url":"https://alion.io/job/intel-cpu-rtl-design-engineer.json","meta":{"generated_at":"2026-10-30T00:24:52Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":388,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-31T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":35},"rest":"https://alion.io/mcp/rest/get_company?id=35"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fintel-cpu-rtl-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fintel-cpu-rtl-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fintel-cpu-rtl-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/intel-cpu-rtl-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fintel-cpu-rtl-design-engineer"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":2986008}},{"tool":"search_jobs","arguments":{"company":"intel.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":2986008},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. 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