{"id":3531365,"url":"https://alion.io/job/intel-eda-tools-software-engineer","title":"EDA Tools Software Engineer","company":{"id":35,"name":"Intel","domain":"intel.com","url":"https://alion.io/company/intel","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":83,"open_postings":94,"ghost_share":0.032,"stale_share":0.564,"repost_share":0.043,"time_to_fill_p50_days":30,"computed_at":"2026-11-03T05:54:40Z"}},"role":"Backend","role_family":"Backend","seniority":"junior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Hillsboro, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":103000,"max_usd":213000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":1118},"experience_years_min":1,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":true},{"name":"Cadence Virtuoso","optional":true},{"name":"KLayout","optional":true},{"name":"Linux","optional":true},{"name":"Python","optional":true},{"name":"Synopsys IC Validator","optional":true},{"name":"Unix","optional":true}],"status":"live","first_seen_at":"2026-10-28T00:00:00Z","employer_posted_date":"2026-10-28","last_verified_at":"2026-11-04T00:12:10Z","board_verified":true,"closed_at":null,"days_open":7,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":7},"description":"Job Details:\nJob Description:\nAs a member of the PTD Litho Frame Automation Team (FRAT) in LTD (Logic Technology Development), you will be responsible for process design rule definition, construction and validation of lead certification Tape-in Collaterals for Intel's next generation process technology and products. You will be responsible for the validation and creation of VLSI layout that will enable fundamental process development.\nYour responsibilities will include but will not be limited to:\nVerify VLSI layout adherence to complex layout design rules, specifically ownership in Quality Assurance of FRAT designs across all Intel process nodes\nTroubleshoot design and PDK(Process Design Kit) verification issues with complex physical design flows, both industry standard and Intel tools and flows\nWrite/update software code for cell design and testcases, verification and package design content for distribution\nCAD design development and support of LTD Tape-in Collateral Library for ALL Intel Process Technology nodes including CR experimental Path Finding projects\nCollaborating, directing, extracting, executing designs and constructs that will be used for process implementation, monitoring, improvement and development well ahead of any other team in LTD. This interaction will be with a very diverse team including Litho, Integration, Device, Test Chip, Tape Out, and OPC and RET (Reticle Enhancement Team) experts. These designs will be used during development, refined and then made available for HVM (High Volume Manufacturing)\nQualifications:\nMinimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.\nMinimum Qualifications:\nBachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 6+ months of hands-on experience in the domain and demonstrated skills gained through internships, academic projects, coursework, or hands-on training\nOR\nMaster's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with no prior professional experience\nHands-on experience includes:Coursework and background should include VLSI design or CAD, programming in Python or C++, Semiconductor Device Physics or basic electrical circuit theory, Silicon manufacturing flows\n\nPreferred Qualifications:\nFamiliarity with semiconductor processing/engineering or computer science (from coursework or internship or work experience)\nVLSI Circuit mask design layout and/or verification (from coursework or internship or work experience)\nBasic solid-state physics, optics and IC (Integrated Circuit) process flow (from coursework or internship or work experience)\nProgramming skills in a high-level programming language (from coursework or internship or work experience)\nFamiliarity with UNIX/Linux platforms (from coursework or internship or work experience)\nExperience with Cadence Virtuoso, Klayout, and tools such as Calibre DRV or Calibre\nKnowledge of design rule checks (DRC), ICV, or IC Validator software tools\nExperience with custom design and verification tools, debugging, and flow development\nStrong communication and collaboration skills for cross-functional teamwork\nProactive mindset with a focus on continuous improvement and learning\nFor information on Intel’s immigration sponsorship guidelines, please see Intel U.S. Immigration Sponsorship Information\nJob Type:\nExperienced HireShift:\nShift 1 (United States of America)Primary Location:\nUS, Oregon, HillsboroAdditional Locations:\nPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust\nN/ABenefits\nWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.\nAnnual Salary Range for jobs which could be performed in the US: $95,640.00-181,940.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role\nThis role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.*\nADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. 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