{"id":2985981,"url":"https://alion.io/job/intel-gpu-design-verification-engineer","title":"GPU Design Verification Engineer","company":{"id":35,"name":"Intel","domain":"intel.com","url":"https://alion.io/company/intel","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":84,"open_postings":124,"ghost_share":0.024,"stale_share":0.556,"repost_share":0.04,"time_to_fill_p50_days":24,"computed_at":"2026-10-23T05:54:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"middle","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Santa Clara, United States","Folsom, United States","Hillsboro, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":120000,"max_usd":233000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":609},"experience_years_min":3,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Python","optional":true},{"name":"SystemVerilog","optional":true},{"name":"UVM","optional":true}],"status":"live","first_seen_at":"2026-10-16T00:00:00Z","employer_posted_date":"2026-10-16","last_verified_at":"2026-10-23T15:03:27Z","board_verified":true,"closed_at":null,"days_open":7,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":7},"description":"Job Details:\nJob Description:\nPerforms functional verification of graphics logic components, including 3D graphics, media, and display, to ensure design will meet specification requirements.\nDefines and develops scalable and reusable IP verification plans, test benches, and architecture for verification environment to ensure coverage to confirm to graphics microarchitecture specifications.\nExecutes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.\nReplicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests.\nCollaborates with GPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals.\nDocuments test plans and drive technical reviews of plans and proofs with design and architecture teams.\nMaintains and improves existing functional verification infrastructure and methodology.\nParticipates in the definition of verification infrastructure and related TFMs needed for functional design verification.\nQualifications:\nYou must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.\nMinimum Qualifications:\nBachelor Degree in Electronics, Computer Engineering or related engineering with 3+ year experience in silicon design development OR Master's Degree in Electronics, Computer Engineering or related engineering with 2+ years of experience in silicon design development undefined.\nTest Bench bring-up at IP level and strong programming skills in System Verilog and UVM.\nHands on verification experience working on ASIC, CPU or GPU.\nTest Plan development experience at IP level with coverage closures.\nCoverage driven verification testbench development functional modeling and test writing.\nPreferred Requirements:\nUnderstanding of Graphics architecture.\nExperience with industry standard frontend design and verification flows, tools, methodology.\nExperience with scripting shell, PERL, python.\nJob Type:\nExperienced HireShift:\nShift 1 (United States of America)Primary Location:\nUS, California, Santa ClaraAdditional Locations:\nUS, California, Folsom, US, Oregon, HillsboroPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust\nN/ABenefits\nWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.\nAnnual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role\nThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*\nADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. 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