{"id":2985912,"url":"https://alion.io/job/intel-gpu-physical-design-engineer","title":"GPU Physical Design Engineer","company":{"id":35,"name":"Intel","domain":"intel.com","url":"https://alion.io/company/intel","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":84,"open_postings":88,"ghost_share":0.034,"stale_share":0.523,"repost_share":0.045,"time_to_fill_p50_days":30,"computed_at":"2026-10-25T05:49:26Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"junior","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Heredia, Costa Rica"],"countries":["CR"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":26000,"max_usd":63000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":5425},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Linux","optional":false},{"name":"Python","optional":false},{"name":"Unix","optional":false},{"name":"Machine Learning","optional":true}],"status":"live","first_seen_at":"2026-10-20T00:00:00Z","employer_posted_date":"2026-10-20","last_verified_at":"2026-10-24T03:51:18Z","board_verified":true,"closed_at":null,"days_open":5,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":5},"description":"Job Details:\nJob Description:\nThe Role and Impact\nAs a GPU Physical Design Engineer, you will play a pivotal role in implementing and optimizing integrated and discrete graphics blocks on advanced process technologies. You will be responsible for executing a wide range of physical design tasks, including synthesis, floor planning, place-and-route, static timing analysis, and layout verification. Your contributions will be essential in delivering high-performance GPUs that power cutting-edge technologies such as gaming, AI, and media processing.\nBusiness Group\nYou will be part of Intel's Data Center Group (DCG), a leading organization dedicated to driving innovation and delivering high-performance solutions for critical computing needs. The group focuses on developing technologies that enhance data center operations and accelerate advancements in computing. Working within DCG, you will collaborate with a world-class team committed to shaping the future of technology.\nThe primary responsibilities for this role will include, but are not limited to:\nExecute physical design workflows, including floor planning, synthesis, place-and-route, and layout optimization.\nConduct static timing analysis, formal verification, and layout verification to ensure design integrity.\nAutomate tool and flow methodologies using scripting languages to improve efficiency and flexibility.\nCollaborate with cross-functional teams to resolve design challenges and implement innovative methodologies.\nAssist in defining design requirements such as frequency and operating voltages based on product specifications.\nQualifications:\nMinimum Qualifications:\nMinimum qualifications are required to be initially considered for this position.\nBachelor's degree in Electrical Engineering, Computer Engineering, Mechatronics, or a related field with 0-1 years of hands-on experience in physical design workflows, gained through internships, academic projects, coursework, or hands-on training.\nIntermediate experience in ASIC design flows, including synthesis, place-and-route, static timing analysis, and layout verification.\nBasic Knowledge with Unix/Linux environments, along with scripting experience using Python and TCL.\nKnowledge of library collaterals qualification and logic/VLSI/ASIC design principles.\nIntermediate English language proficiency.\nMust have unrestricted - permanent right to work in Costa Rica.\nPreferred Qualifications:\nPreferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.\nMaster's degree in Electrical Engineering or Computer Engineering with no prior professional experience.\n Experience with SoC integration, including floorplan/timing integration for various RLS blocks.\nHands-on experience with industry-standard EDA tools and methodologies.\nKnowledge of data analytics, machine learning, and their applications in physical design.\nStrong communication and interpersonal skills to work effectively in a collaborative environment.\nJoin our team to work on cutting-edge technology, drive innovation, and grow your career in a dynamic and fast-paced environment.\nJob Type:\nCollege GradShift:\nShift 1 (Costa Rica)Primary Location:\nCosta Rica, San JoseAdditional Locations:\nPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust\nN/AWork Model for this Role\nThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*\nADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.","description_format":"text","description_chars":4433,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[{"language":"English","level":"Intermediate (B1)","optional":false}]},"benefits":["Hybrid work"],"hiring_locations":[{"name":"Costa Rica","iso":"CR","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Semiconductor Manufacturing","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-21T08:25:14Z"}],"visa":[],"liveness":{"score":62,"band":"ok","label":"Likely open","p_open":1,"p_active":0.618,"p_room":1,"age_days":5,"expected_fill_days":30,"reasons":["conf:25","stale_co","velocity","win:early","comp:junior,brand"],"computed_at":"2026-10-25T05:49:26Z"},"pay":null,"html_url":"https://alion.io/job/intel-gpu-physical-design-engineer","json_url":"https://alion.io/job/intel-gpu-physical-design-engineer.json","meta":{"generated_at":"2026-10-25T19:22:40Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":27564,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-26T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":35},"rest":"https://alion.io/mcp/rest/get_company?id=35"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fintel-gpu-physical-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fintel-gpu-physical-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fintel-gpu-physical-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/intel-gpu-physical-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fintel-gpu-physical-design-engineer"}]}