{"id":4345295,"url":"https://alion.io/job/intel-pnp-lab-eng-intern-worker","title":"PnP Lab Eng. Intern Worker","company":{"id":35,"name":"Intel","domain":"intel.com","url":"https://alion.io/company/intel","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":84,"open_postings":114,"ghost_share":0.009,"stale_share":0.596,"repost_share":0.026,"time_to_fill_p50_days":29,"computed_at":"2026-11-15T07:52:55Z"}},"role":"Early Careers","role_family":"Early Careers","seniority":"intern","employment_type":"internship","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"explicit","locations":["Belén, Costa Rica"],"countries":["CR"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":1,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":true},{"name":"Python","optional":true}],"status":"live","first_seen_at":"2026-11-13T00:00:00Z","employer_posted_date":"2026-11-13","last_verified_at":"2026-11-15T21:22:49Z","board_verified":true,"closed_at":null,"days_open":2,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":2},"description":"Job Details:\nJob Description:\nAs a Physical Design Engineering Undergraduate Intern, you will contribute to the physical implementation of silicon designs, ensuring they are ready for manufacturing. You'll gain hands-on experience in physical design workflows, collaborating with cross-functional teams to enhance design scalability and manufacturability. This role offers the opportunity to develop your skills in areas like signal integrity, timing analysis, and design optimization while exploring a future career in engineering.\nThe Silicon and Platform Engineering Group (SPE) is dedicated to advancing technology and developing innovative solutions that support Intel's mission of delivering cutting-edge products. This team focuses on ensuring the physical designs of silicon and platforms meet manufacturing and performance standards, fostering a collaborative and dynamic environment where engineering excellence thrives.\nThe primary responsibilities for this role will include, but are not limited to:\nPnP Lab Engineer is responsible for measuring, testing and analyzing key performance and power indicators for architecture enhancements and optimizations.\nPerform power measurements and analysis across several subsystems and domains using power measurement tools and logic analyzers.\nPerform measurements and analysis on new proof of concepts, technology readiness for system level optimizations for performance and responsiveness using performance monitoring tools.\nAbility to change configurations for testing and measurement with SOC, platform components, display panel, install different device drivers and firmware, and executing benchmark workloads.\nComprehend technical decomposition of Power, Performance and responsiveness indicators and its implications on different Client products architectures: CPU, GPU, NPU, IO among others.\nWrite test scripts as part of data execution and tasks improvements, to enable system level measurements and data analysis.\nBe able to adapt AI into daily tasks\nQualifications:\nMinimum Qualifications:\nMinimum qualifications are required to be initially considered for this position.\nPursuing a Bachelor's degree in Electronics or Electrical Engineering with at least 50 percent of courses completed, or a Master's degree in the same field.\nBachelor's candidates must demonstrate 0-1 years of hands-on experience in physical design, with skills gained through internships, academic projects, coursework, or hands-on training. Master's candidates require no prior professional experience.\nProficiency in English (written and verbal).\nCompletion of at least 1-2 courses in Electrical/Electromagnetic fundamentals.\nMaintain a minimum of 80 percent GPA.\nAvailability to work at least 22.5 hours per week during the internship period.\nDisposition to work a minimum of 1 year in this position.\nLegal authorization to work in Costa Rica.\nPreferred Qualifications:\nPreferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.\nSelf-motivated with a willingness to learn and contribute in a collaborative environment.\nStrong analytical and problem-solving abilities.\nEffective communication and teamwork skills.\nPassion for innovation and interest in exploring cutting-edge technologies.\nPython, C++, Batch programing skills\nExperience contributing to industry standards or consortiums.\nAbility to adapt and thrive in dynamic, fast-paced environments.\nAdvanced problem-solving skills and experience debugging complex signal integrity challenges.\nEffective communication and collaboration skills to work with interdisciplinary teams.\nDiscover hands-on learning, impactful projects, and a collaborative environment where your contributions will shape the future of technology-apply today for an exciting opportunity to grow with Intel.\nJob Type:\nStudent / InternShift:\nShift 1 (Costa Rica)Primary Location:\nCosta Rica, San JoseAdditional Locations:\nPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust\nN/AWork Model for this Role\nThis role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.*\nADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. 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