{"id":4345294,"url":"https://alion.io/job/intel-power-integrity-intern-worker-engineer","title":"Power Integrity Intern Worker Engineer","company":{"id":35,"name":"Intel","domain":"intel.com","url":"https://alion.io/company/intel","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":84,"open_postings":114,"ghost_share":0.009,"stale_share":0.596,"repost_share":0.026,"time_to_fill_p50_days":29,"computed_at":"2026-11-15T07:52:55Z"}},"role":"Hardware","role_family":"Hardware","seniority":"intern","employment_type":"internship","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"explicit","locations":["Belén, Costa Rica"],"countries":["CR"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":1,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Ansys HFSS","optional":true},{"name":"Ansys SIwave","optional":true},{"name":"Cadence Sigrity","optional":true},{"name":"JMP","optional":true},{"name":"MATLAB","optional":true},{"name":"Synopsys HSPICE","optional":true}],"status":"live","first_seen_at":"2026-11-13T00:00:00Z","employer_posted_date":"2026-11-13","last_verified_at":"2026-11-15T21:22:49Z","board_verified":true,"closed_at":null,"days_open":2,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":2},"description":"Job Details:\nJob Description:\nAs a Physical Design Engineering Undergraduate Intern, you will actively contribute to the physical implementation of silicon and platform designs to ensure readiness for manufacturing. This role will provide hands-on experience in design flows, power integrity analysis, and validation activities for high-speed interconnect architecture. You will gain valuable skills, apply theoretical knowledge to practical projects, and explore future career opportunities while collaborating with a team of innovative engineers.\nThe Silicon and Platform Engineering Group (SPE) drives innovation in silicon and platform design, ensuring the physical designs meet manufacturing and performance standards. The team focuses on delivering scalable, efficient solutions that align with Intel's broader goals of advancing technology and enabling cutting-edge products. Joining this group offers a collaborative environment committed to excellence in engineering and design.\nThe primary responsibilities for this role will include, but are not limited to:\nAssist in the physical implementation of package and platform designs, contributing to power integrity and high-speed interconnect validation.\nCollaborate with cross-functional teams to support design scalability, automation, and manufacturability.\nEngage in verification and signoff processes to ensure compliance with performance and manufacturing standards.\nApply theoretical knowledge to practical projects, including power integrity analysis and physical design optimization.\nSupport design initiatives by leveraging advanced tools and methodologies to address technical challenges.\nQualifications:\nMinimum Qualifications:\nMinimum qualifications are required to be initially considered for this position.\nPursuing a Bachelor's degree in Electronics or Electrical Engineering with at least 50 percent of coursework completed OR pursuing a Master's degree in the same field.\nBachelor's candidates must demonstrate 0-1 years of hands-on experience in physical design, with skills gained through internships, academic projects, coursework, or hands-on training. Master's candidates require no prior professional experience.\nProficiency in English (written and verbal).\nCompletion of at least 1-2 courses in Electrical/Electromagnetic fundamentals.\nMaintain a minimum of 80 percent GPA.\nAvailability to work at least 22.5 hours per week during the internship period.\nCommitment to work a minimum of 1 year in this position.\nLegal authorization to work in Costa Rica.\nPreferred Qualifications:\nPreferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.\nFamiliarity with electrical simulation tools such as Sigrity PowerSI, SiWave, Hspice, Matlab, or Ansys HFSS.\nExperience with PCB design or circuit simulators.\nKnowledge of statistical analysis tools such as JMP or equivalent.\nStrong collaboration and analytical skills with an eagerness to learn and solve technical challenges.\nBring your passion for innovation and engineering to Intel-apply today and make your mark on the technology of tomorrow.\nJob Type:\nStudent / InternShift:\nShift 1 (Costa Rica)Primary Location:\nCosta Rica, San JoseAdditional Locations:\nPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust\nN/AWork Model for this Role\nThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*\nADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. 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