{"id":2986016,"url":"https://alion.io/job/intel-senior-eda-design-automation-engineer-digital-implementation","title":"Senior EDA Design Automation Engineer - Digital Implementation","company":{"id":35,"name":"Intel","domain":"intel.com","url":"https://alion.io/company/intel","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":83,"open_postings":94,"ghost_share":0.032,"stale_share":0.564,"repost_share":0.043,"time_to_fill_p50_days":30,"computed_at":"2026-11-03T05:54:40Z"}},"role":"DevOps","role_family":"DevOps","seniority":"senior","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["George Town, Malaysia"],"countries":["MY"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":17000,"max_usd":48000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":3508},"experience_years_min":8,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"Unix","optional":false},{"name":"Cadence Genus","optional":true},{"name":"CI/CD","optional":true}],"status":"live","first_seen_at":"2026-10-15T00:00:00Z","employer_posted_date":"2026-10-15","last_verified_at":"2026-11-04T00:12:10Z","board_verified":true,"closed_at":null,"days_open":20,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":20},"description":"Job Details:\nJob Description:\nThe Role and Impact\nWe are seeking an EDA Tools Hardware Engineer to develop and enhance cutting-edge engineering design automation tools, methodologies, and workflows. In this role, you will drive the enablement of next-generation hardware design tools and flows, directly contributing to improved efficiency, power, and performance optimization for advanced technology nodes. Your expertise will support the seamless adoption and advancement of EDA technologies, ensuring Intel remains at the forefront of innovation in silicon design. \nBusiness Group\nThe Intel Foundry business group is dedicated to delivering world-class silicon design solutions through collaboration with technology development teams. This group focuses on driving Design Technology Co-Optimization (DTCO), enabling foundational IPs (FIPs), Process Design Kits (PDKs), and reference flows. These efforts empower Intel's design ecosystem and ensure scalability, efficiency, and cutting-edge innovation, aligning with the company's broader goal of technological leadership in advanced silicon and packaging technologies. \nKey Responsibilities\nArchitect and implement EDA tool flows for Digital Implementation and Sign Off design flow, digital and analog design, spanning front-end and back-end processes from RTL to GDS. \nExecute disciplined flow development and delivery to meet tight milestones for advanced technology nodes. \nCollaborate with external EDA vendors on enabling reference flows optimized for Intel technology platforms. \nDevelop and verify hardware designs, integrating design components into hierarchical systems to ensure end-to-end tool testing coverage. \nEnhance tools, scripts, and platforms to optimize productivity, power, and performance outcomes. \nAnalyze and refine methodologies to improve design automation processes for technology transitions and new node enablement. \nBuild deep expertise in areas such as digital design, verification, layout, full-chip integration, clocking, and timing, and apply these insights to future design flow enhancements. \nProvide strategic input on industry trends in EDA and drive transformative initiatives for hardware design environments.\nQualifications:\nMinimum Qualifications\nBachelor's, Master's or PhD degree in Electrical Engineering, Computer Engineering, Electronics Engineering, or a related field. \nFor candidates with a Bachelor's degree: Minimum of 8 years of experience in the development of EDA tools, flows, or design environments for digital or analog designs. \nProficiency in EDA tools and workflows, including expertise in physical design flows, IP integration, and packaging technologies. \nStrong AI and programming skills with experience in UNIX scripting languages (e.g., Python, Perl, TCL). \nFamiliarity with design flow automation, source control management systems, cloud infrastructure, and compute allocation. \nPreferred Qualifications\nDemonstrated ability to understand and interpret industry trends in EDA and align tool initiatives with advanced technologies. \nFamiliarity with automated SoC design methodologies and analog/mixed-signal design workflows, (Eg. Cadence Genus, Innovus). \nExperience in deploying new features for revision control systems, continuous integration, and design data management. \nExceptional analytical, debugging, and problem-solving abilities, coupled with strong communication skills. \nJoin us in shaping the future of silicon design and innovation. Your expertise and contributions will be at the heart of delivering impactful technologies that redefine possibilities at Intel.\nJob Type:\nExperienced HireShift:\nShift 1 (Malaysia)Primary Location:\nMalaysia, PenangAdditional Locations:\nPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust\nN/AWork Model for this Role\nThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*\nADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.","description_format":"text","description_chars":4879,"description_truncated":false,"requirements":{"experience_years_min":8,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["Hybrid work"],"hiring_locations":[{"name":"Malaysia","iso":"MY","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Semiconductor Manufacturing","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-21T08:25:14Z"}],"visa":[],"liveness":{"score":55,"band":"ok","label":"Likely open","p_open":1,"p_active":0.612,"p_room":0.9,"age_days":19,"expected_fill_days":30,"reasons":["conf:3","stale_co","velocity","win:mid","comp:brand"],"computed_at":"2026-11-03T05:54:40Z"},"pay":null,"html_url":"https://alion.io/job/intel-senior-eda-design-automation-engineer-digital-implementation","json_url":"https://alion.io/job/intel-senior-eda-design-automation-engineer-digital-implementation.json","meta":{"generated_at":"2026-11-04T06:09:25Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":9562,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-05T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":35},"rest":"https://alion.io/mcp/rest/get_company?id=35"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fintel-senior-eda-design-automation-engineer-digital-implementation"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fintel-senior-eda-design-automation-engineer-digital-implementation"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fintel-senior-eda-design-automation-engineer-digital-implementation"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/intel-senior-eda-design-automation-engineer-digital-implementation\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fintel-senior-eda-design-automation-engineer-digital-implementation"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":2986016}},{"tool":"search_jobs","arguments":{"company":"intel.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":2986016},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. 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