{"id":3168404,"url":"https://alion.io/job/intel-soc-design-verification-engineer-3","title":"SoC Design Verification Engineer","company":{"id":35,"name":"Intel","domain":"intel.com","url":"https://alion.io/company/intel","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":84,"open_postings":124,"ghost_share":0.024,"stale_share":0.556,"repost_share":0.04,"time_to_fill_p50_days":24,"computed_at":"2026-10-23T05:54:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"junior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Fort Collins, United States","Folsom, United States","Hillsboro, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":89000,"max_usd":173000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":501},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"SystemVerilog","optional":true},{"name":"UVM","optional":true}],"status":"live","first_seen_at":"2026-10-22T00:00:00Z","employer_posted_date":"2026-10-22","last_verified_at":"2026-10-24T03:51:18Z","board_verified":true,"closed_at":null,"days_open":2,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":2},"description":"Job Details:\nJob Description:\nAs a SoC Design Verification Engineer, you will be responsible for ensuring the functionality and reliability of Intel's cutting-edge server SoCs. You will perform functional logic verification and emulation validation to confirm designs meet specifications, uncover potential issues, and implement corrective measures. Through your technical contributions, you will play a vital role in advancing the development of next-generation Xeon server products, driving innovation and excellence in Intel's technology offerings.\nBusiness group\nYou will join Intel's Data Center Group (DCG), which is dedicated to delivering leading-edge technologies and solutions for data centers that power the world's digital infrastructure. The team focuses on validating advanced Xeon server SoCs and IPs, providing innovative solutions that enhance performance, scalability, and efficiency. The group's mission aligns with Intel's broader vision of creating world-changing technology that enriches lives globally.\nKey Responsibilities\nPerform functional verification and emulation validation of integrated SoCs to ensure designs meet specifications.\nDevelop scalable and reusable block, subsystem, and SoC verification plans, test benches, and environments.\nExecute verification plans, analyze system simulation models, and debug power and performance issues.\nRoot-cause failure issues and implement corrective measures in the pre-silicon environment.\nCollaborate with architects, RTL developers, post-silicon teams, and physical design experts to enhance verification.\nDocument test plans and drive technical reviews with design and architecture teams.\nConduct regression and debug tests to integrate security activities and ensure comprehensive coverage.\nMaintain and improve verification infrastructure and methodology, absorbing learnings from post-silicon validations.\nQualifications:\nThis is an entry level position. You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum qualifications and are considered a plus factor in identifying top candidates.\nRequirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.\nMinimum Qualifications\nMaster's degree in Electrical Engineering, Computer Science or Computer Engineering\n+6 months of experience in Silicon Design and/or Validation/Verification methodologies and tools.\nPreferred Qualifications\nExperience in design verification for complex IPs and SoCs.\nKnowledge of UVM/SystemVerilog constrained-random coverage-based design verification methodologies.\nFamiliarity with the complete verification lifecycle, including test plan creation, bug debugging, and coverage closure.\nSkills in developing validation test suites and driving continuous improvement into existing methodologies.\nUnderstanding of cache coherency principles in multiprocessor SoCs and layered protocols.\nProficiency in scripting languages for automation purposes.\nStrong debugging skills and ability to independently resolve technical issues.\nExperience with Xeon CPU pre-silicon, emulation validation, or post-silicon validation.\nJoin us to innovate, learn, and make a meaningful impact in Intel's transformative journey to create world-changing technology.\nJob Type:\nCollege GradShift:\nShift 1 (United States of America)Primary Location:\nUS, Colorado, Fort CollinsAdditional Locations:\nUS, California, Folsom, US, Oregon, HillsboroPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust\nN/ABenefits\nWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.\nAnnual Salary Range for jobs which could be performed in the US: $105,650.00-149,150.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role\nThis role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.The application window for this job posting is expected to end by 11/05/2026*\nADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.","description_format":"text","description_chars":5462,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"master","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Incident Response","Semiconductor Manufacturing","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-23T17:59:23Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 2,014 · green card filings: 487","filings_12m":2014,"filings_prev_12m":3001,"green_card_filings_12m":487,"median_offered_wage_usd":134579,"route":null,"cap_exempt":false,"checked_at":"2026-10-15T11:24:14+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":728}],"liveness":{"score":86,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.86,"p_room":1,"age_days":2,"expected_fill_days":30,"reasons":["conf:2","win:early","comp:junior,brand"],"computed_at":"2026-10-24T06:04:12Z"},"pay":null,"html_url":"https://alion.io/job/intel-soc-design-verification-engineer-3","json_url":"https://alion.io/job/intel-soc-design-verification-engineer-3.json","meta":{"generated_at":"2026-10-24T06:04:12Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":8737,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-25T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":35},"rest":"https://alion.io/mcp/rest/get_company?id=35"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fintel-soc-design-verification-engineer-3"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fintel-soc-design-verification-engineer-3"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fintel-soc-design-verification-engineer-3"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/intel-soc-design-verification-engineer-3\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fintel-soc-design-verification-engineer-3"}]}