{"id":4011232,"url":"https://alion.io/job/intel-soc-design-verification-engineer-4","title":"SoC Design Verification Engineer","company":{"id":35,"name":"Intel","domain":"intel.com","url":"https://alion.io/company/intel","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":83,"open_postings":106,"ghost_share":0.028,"stale_share":0.566,"repost_share":0.047,"time_to_fill_p50_days":30,"computed_at":"2026-11-10T06:52:35Z"}},"role":"Hardware","role_family":"Hardware","seniority":"junior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Santa Clara, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"SystemVerilog","optional":true},{"name":"UVM","optional":true}],"status":"live","first_seen_at":"2026-11-09T00:00:00Z","employer_posted_date":"2026-11-09","last_verified_at":"2026-11-10T10:16:55Z","board_verified":true,"closed_at":null,"days_open":1,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":1},"description":"Job Details:\nJob Description:\nThe Role and Impact accuracy and functionality of Intel's next-generation Xeon server SoCs. Your day-to-day responsibilities will focus on performing functional logic verification, developing scalable verification plans, and executing emulation models to uncover and address design challenges. Your contributions will directly enhance the quality, reliability, and performance of Intel's flagship server products, making this position integral to delivering cutting-edge technology to global markets.\nYou will be joining Intel's Data Center Group (DCG), a dynamic organization dedicated to advancing the capabilities of the world's data centers. DCG focuses on developing innovative server technologies that drive business transformation, cloud computing, and AI workloads. As part of this team, you will help propel Intel's vision of creating world-changing technology that enriches the lives of every person on earth.\nThe primary responsibilities for this role will include, but are not limited to:\nPerform functional logic verification of integrated SoC designs to ensure adherence to specifications.\nDefine and develop scalable and reusable block, subsystem, and SoC verification plans, test benches, and environments.\nExecute verification plans utilizing emulation and system simulation models to evaluate design power, performance, and functionality.\nDebug and analyze issues in the pre-silicon environment and implement corrective measures for resolution.\nCollaborate with architects, RTL developers, and post-silicon teams to improve verification processes for complex architectural features.\nDocument technical test plans and participate in reviews with design and architecture teams.\nIncorporate security test coverage within the verification environment to ensure compliance with security requirements.\nMaintain and optimize existing functional verification methodologies for continuous improvement.\nAbsorb post-silicon learnings to refine pre-silicon validation strategies for future projects.\nQualifications:\nMinimum Qualifications:\nMinimum qualifications are required to be initially considered for this position.\nBachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with 0-1 years of hands-on experience in silicon design and/or validation gained through internships, academic projects, coursework, or hands-on training OR Master's degree in the same fields with no prior professional experience required.\nDemonstrated coursework or technical experience in silicon design and/or validation/verification.\nPreferred Qualifications:\nPreferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.\nExperience with developing and verifying complex IPs and/or SoCs using UVM/SystemVerilog.\nKnowledge of OVM/UVM, constrained random verification methodologies, and the complete verification lifecycle, including test plan development, execution, debug, and coverage closure.\nProficiency in scripting languages for automation and process improvement.\nFamiliarity with cache coherency principles and layered protocols in multi-processor SoCs.\nExperience with Xeon CPU pre-silicon, emulation validation, or post-silicon validation.\nStrong analytical, debugging, and problem-solving skills with a proactive mindset for task ownership and collaboration.\nWe invite you to bring your skills and passion to Intel, where you'll have the opportunity to grow your expertise, innovate on impactful projects, and contribute to building a brighter future in technology.\nJob Type:\nCollege GradShift:\nShift 1 (United States of America)Primary Location:\nUS, California, Santa ClaraAdditional Locations:\nPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust\nN/ABenefits\nWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.\nAnnual Salary Range for jobs which could be performed in the US: $105,650.00-149,150.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role\nThis role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.*\nADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.","description_format":"text","description_chars":5569,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Incident Response","Semiconductor Manufacturing","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-11-10T10:16:55Z"}],"visa":[{"country":"US","licensed_sponsor":true,"adverts_offering_sponsorship_24m":0,"sanctioned_now":false,"evidence":"H-1B filings in 12 months: 2,029 · green card filings: 490","filings_12m":2029,"filings_prev_12m":3014,"green_card_filings_12m":490,"median_offered_wage_usd":134832,"route":null,"cap_exempt":false,"checked_at":"2026-11-10T11:34:35+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":728}],"liveness":{"score":86,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.86,"p_room":1,"age_days":1,"expected_fill_days":30,"reasons":["conf:2","win:early","comp:junior,brand"],"computed_at":"2026-11-10T13:07:58Z"},"pay":null,"html_url":"https://alion.io/job/intel-soc-design-verification-engineer-4","json_url":"https://alion.io/job/intel-soc-design-verification-engineer-4.json","meta":{"generated_at":"2026-11-10T13:07:58Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":30562,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-11T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.1,"usd":0.01,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":35},"rest":"https://alion.io/mcp/rest/get_company?id=35"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fintel-soc-design-verification-engineer-4"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":2,"usd":0.2},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fintel-soc-design-verification-engineer-4"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.1,"usd":0.01},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fintel-soc-design-verification-engineer-4"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/intel-soc-design-verification-engineer-4\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fintel-soc-design-verification-engineer-4"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":4011232}},{"tool":"search_jobs","arguments":{"company":"intel.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":4011232},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. Docs: https://alion.io/developers"}}