{"id":4011234,"url":"https://alion.io/job/intel-soc-logic-design-engineer-2","title":"SoC Logic Design Engineer","company":{"id":35,"name":"Intel","domain":"intel.com","url":"https://alion.io/company/intel","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":83,"open_postings":106,"ghost_share":0.028,"stale_share":0.566,"repost_share":0.047,"time_to_fill_p50_days":30,"computed_at":"2026-11-10T06:52:35Z"}},"role":"Hardware","role_family":"Hardware","seniority":"junior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Santa Clara, United States","Folsom, United States","Hillsboro, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Xcelium","optional":false},{"name":"Synopsys Design Compiler","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false}],"status":"live","first_seen_at":"2026-11-09T00:00:00Z","employer_posted_date":"2026-11-09","last_verified_at":"2026-11-10T10:16:55Z","board_verified":true,"closed_at":null,"days_open":1,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":1},"description":"Job Details:\nJob Description:\nAs a SoC Logic Design Engineer, you will actively contribute to the development, coding, and simulation of system-on-chip (SoC) designs. You will integrate logic from various IP blocks and subsystems into a complete chip design, ensuring power, performance, area, and timing goals are met. Your work will directly impact the delivery of cutting-edge, high-quality SoC solutions that drive advancements in technology and innovation.\nThe role is part of Intel's Data Center Group (DCG), which focuses on delivering advanced solutions that enable data-centric computing for global industries. As a member of this organization, you will collaborate on projects that shape the performance, security, and efficiency of Intel's data center offerings, contributing to the broader infrastructure required for modern computing needs.\nThe primary responsibilities for this role will include, but are not limited to:\nDesign and implement logic for SoC blocks and subsystems using register transfer level (RTL) coding techniques.\nIntegrate IP blocks and subsystems into full chip SoC designs, ensuring seamless functionality.\nConduct quality checks across various aspects of logic design, from RTL coding to timing, power, and area convergence.\nOptimize logic designs to meet power, performance, area, and timing targets.\nReview verification plans and resolve failing RTL tests to ensure correctness of design features. - Collaborate with IP providers to integrate and validate IPs for SoC-level designs.\nFollow secure development practices to meet security objectives and address security threats in designs.\nDrive compliance with quality assurance standards for successful IP and SoC handoff.\nQualifications:\nMinimum Qualifications:\nMinimum qualifications are required to be initially considered for this position.\nBachelor's degree in Electrical Engineering, Computer Engineering, or related field, with 0-1 years of hands-on experience in logic design gained through internships, academic projects, coursework, or hands-on training OR a Master's degree in Electrical Engineering, Computer Engineering, or related field with no prior professional experience.\nAdvanced experience in register transfer level (RTL) coding languages such as Verilog or VHDL.\nBasic knowledge with industry-standard tools for logic design, synthesis, and simulation (e.g., Synopsys Design Compiler, Cadence Xcelium).\nBasic knowledge of power, performance, and area optimization in SoC designs.\nBasic knowledge of timing analysis and static timing tools.\nPreferred Qualifications:\nPreferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.\nStrong analytical and problem-solving skills with attention to detail.\nEffective communication skills to collaborate with cross-functional teams.\nExperience working on academic or industry projects involving SoC design and IP integration.\nPassion for learning and contributing to advancements in semiconductor technology.\nIf you are eager to build a career in cutting-edge SoC design and want to be part of a collaborative, innovative, and dynamic environment, we encourage you to apply and join Intel in shaping the future of technology.\nJob Type:\nCollege GradShift:\nShift 1 (United States of America)Primary Location:\nUS, California, Santa ClaraAdditional Locations:\nUS, California, Folsom, US, Oregon, HillsboroPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust\nN/ABenefits\nWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.\nAnnual Salary Range for jobs which could be performed in the US: $105,650.00-149,150.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role\nThis role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.*\nADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. 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