{"id":3317039,"url":"https://alion.io/job/intel-soc-logic-design-engineer","title":"SoC Logic Design Engineer","company":{"id":35,"name":"Intel","domain":"intel.com","url":"https://alion.io/company/intel","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":84,"open_postings":90,"ghost_share":0.033,"stale_share":0.533,"repost_share":0.044,"time_to_fill_p50_days":30,"computed_at":"2026-10-28T05:59:10Z"}},"role":"Hardware","role_family":"Hardware","seniority":"junior","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Santa Clara, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":106000,"max_usd":211000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":578},"experience_years_min":1,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"Siemens ModelSim","optional":false},{"name":"Synopsys Design Compiler","optional":false},{"name":"Synopsys SpyGlass","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false}],"status":"closed","first_seen_at":"2026-10-26T00:00:00Z","employer_posted_date":"2026-10-26","last_verified_at":"2026-10-28T09:50:31Z","board_verified":false,"closed_at":"2026-10-28T09:50:31Z","days_open":2,"trust":{"level":"not_scored","repost_count":null,"flags":[],"days_open":2},"description":"Job Details:\nJob Description:\nThe Role and ImpactAs a SoC Logic Design Engineer, you will play a key role in creating and integrating cutting-edge logic designs for next-generation Xeon server product SoCs and IPs. You will actively collaborate with multidisciplinary teams to ensure functional correctness, drive innovation, and contribute to seamless integration and validation on advanced technologies. Your work will directly impact Intel's ability to deliver highly optimized and efficient solutions for data center applications.\nBusiness Group\nYou will be part of the Data Center Group (DCG), a leading organization driving Intel's advancements in cloud computing, AI, and enterprise infrastructure. The group focuses on developing high-performance Xeon processors and other critical technologies that support Intel's mission of delivering world-changing innovation. Through collaboration and excellence, the DCG team pushes the boundaries of design and engineering to meet the evolving needs of the data-driven world.\nKey Responsibilities\n- Collaborate with the SoC integration team to develop and integrate logic designs for components and fabric.\n- Partner with the SoC validation team to identify and resolve bugs, ensuring optimal functionality for SoC RTL and tiles.\n- Work closely with the physical design and architecture teams to maintain architectural accuracy during implementation.\n- Perform design checks using industry-standard tools to ensure compliance with design standards and best practices.\n- Contribute to IC/SoC design and integration processes, ensuring high-quality designs that meet product specifications.\nQualifications:\nMinimum Qualifications \nMaster's degree in Electrical Engineering, Computer EE Engineering, or Computer Science with6+ months of hands-on experience. \n3+ months of experience with IC/SoC design or integration concepts. \n3+ months of experienceh tools such as Synopsys Core tools, VCS, Modelsim, Synopsys Design Compiler, Spyglass, or Lint. \n3+ months of experienceprogramming languages such as Verilog, System Verilog, Perl, Tcl, Python, or C/C++. \nPreferred Qualifications \n- Demonstrated ability to communicate and collaborate effectively within cross-functional teams. \n- Strong problem-solving and critical-thinking skills applicable to complex design challenges. \n- Familiarity with physical design and validation processes. \n- Passion for innovative technology and a desire to contribute to the advancement of the data center industry. \nJoin Intel to become part of a team that's shaping the future of technology. Bring your expertise, creativity, and passion to a role where you can make a lasting impact while advancing your career. Apply today to start your journey toward groundbreaking innovation.\nJob Type:\nCollege GradShift:\nShift 1 (United States of America)Primary Location:\nUS, California, Santa ClaraAdditional Locations:\nPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust\nN/ABenefits\nWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.\nAnnual Salary Range for jobs which could be performed in the US: $105,650.00-149,150.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role\nThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*\nADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.","description_format":"text","description_chars":4838,"description_truncated":false,"requirements":{"experience_years_min":1,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"master","optional":false},"security_clearance":false,"languages":[]},"benefits":["Hybrid work"],"hiring_locations":[{"name":"United States","iso":"US","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Incident Response","Semiconductor Manufacturing","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-27T05:44:46Z"},{"event":"close","at":"2026-10-28T09:50:31Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 2,014 · green card filings: 487","filings_12m":2014,"filings_prev_12m":3001,"green_card_filings_12m":487,"median_offered_wage_usd":134579,"route":null,"cap_exempt":false,"checked_at":"2026-10-15T11:24:14+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":728}],"liveness":null,"pay":null,"html_url":"https://alion.io/job/intel-soc-logic-design-engineer","json_url":"https://alion.io/job/intel-soc-logic-design-engineer.json","meta":{"generated_at":"2026-10-29T03:55:26Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":5982,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-30T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":35},"rest":"https://alion.io/mcp/rest/get_company?id=35"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fintel-soc-logic-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fintel-soc-logic-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fintel-soc-logic-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/intel-soc-logic-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fintel-soc-logic-design-engineer"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3317039}},{"tool":"search_jobs","arguments":{"company":"intel.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3317039},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. Docs: https://alion.io/developers"}}