{"id":3157793,"url":"https://alion.io/job/intel-verification-engineer-ai-soc-development","title":"Verification Engineer – AI SoC Development","company":{"id":35,"name":"Intel","domain":"intel.com","url":"https://alion.io/company/intel","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":84,"open_postings":88,"ghost_share":0.034,"stale_share":0.523,"repost_share":0.045,"time_to_fill_p50_days":30,"computed_at":"2026-10-25T05:49:26Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Toronto, Canada"],"countries":["CA"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":93000,"max_usd":168000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":64},"experience_years_min":6,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Palladium","optional":false},{"name":"Synopsys ZeBu","optional":false},{"name":"SystemVerilog","optional":false}],"status":"live","first_seen_at":"2026-10-23T15:03:27Z","employer_posted_date":"2026-10-23","last_verified_at":"2026-10-24T03:51:18Z","board_verified":true,"closed_at":null,"days_open":2,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":2},"description":"Job Details:\nJob Description:\nThe Role and Impact\nAs an Emulation Engineer at Intel, you will play a pivotal role in the cutting-edge development and validation of Intel's next-generation technologies.\nYou will work as part of a collaborative team to create and optimize emulation and FPGA models, ensuring robust hardware-software integration and acceleration of RTL development.\nYour contributions will directly influence presilicon verification, postsilicon validation, and software development, driving faster and more efficient product deliveries. By leveraging your expertise, you will help shape the tools and methodologies that ensure Intel remains a leader in innovation and technology.\nKey Responsibilities\nBuild and configure emulation and FPGA models using synthesis, partitioning, and routing tools.\nDevelop, test, and debug hardware and software collateral in simulation, emulation, and FPGA environments.\nDefine and develop new emulation tools, flows, and methodologies to improve verification efficiency and usability.\nEnable RTL development acceleration through usability improvements and debugging of failing RTL tests on emulation platforms.\nCollaborate with cross-functional teams, including design, silicon validation, and software, to optimize emulation environments and methodologies.\nDevelop and utilize automation scripts and flows to enhance emulation utilization.\nProvide guidance to verification teams on optimizing test environments, test suites, and emulation methodologies.\nParticipate in SoC and IP bring-up, identify root causes for testbench issues, and resolve emulator/FPGA environment challenges.\nThe ideal candidate should show the following behavioral traits:\nStrong communication and collaboration skills to work effectively with diverse teams.\nQualifications:\nMinimum Qualifications, you must possess the below minimum qualifications to be initially considered for this position.\nBachelor's degree in Electrical Engineering, Computer Engineering, or a related field with 6+ years of experience, or Master's degree with 4+ years of experience, or a PhD with 2+ years of experience.\nExperience should be in the following:\nWorking with emulator such as Palladium, Zebu Emulator, etc.\nProficiency in System Verilog and RTL design fundamentals.\nemulation fundamentals and tools, including FPGA prototyping and configurability.\ndebugging tools and methodologies for hardware validation.\nin automation, scripting, and workflow optimization for emulation environments.\nPreferred Qualifications, are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.\nIn-depth knowledge of microarchitecture fundamentals and digital design principles.\nExperience in debugging complex hardware/software integration issues.\nExperience with hybrid emulation environments, including virtual platforms and FPGA/emulation models.\nFamiliarity with firmware development, SoC integration, and emulation performance optimization techniques.\nJoin Intel to help define the future of technology. Apply today and be part of a team that is driving innovation and creating solutions that shape the world.\nJob Type:\nExperienced HireShift:\nShift 1 (Canada)Primary Location:\nCanada, TorontoAdditional Locations:\nPosting Statement:\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust\nN/AAnnual Salary Range for jobs which could be performed in Canada\nCAD 153,910.00-217,280.00Salary range dependent on a number of factors including location and experience.\nWork Model for this Role\nThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.Canada Accommodation:\nIntel is committed to a culture of accessibility. Intel provides accommodations to applicants and employees with disabilities. Find information and request accommodation here.\n*\nADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.","description_format":"text","description_chars":4800,"description_truncated":false,"requirements":{"experience_years_min":6,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["Hybrid work"],"hiring_locations":[{"name":"Canada","iso":"CA","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Artificial Intelligence","Incident Response","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-23T15:03:27Z"}],"visa":[],"liveness":{"score":63,"band":"ok","label":"Likely open","p_open":1,"p_active":0.632,"p_room":1,"age_days":1,"expected_fill_days":30,"reasons":["conf:25","stale_co","velocity","win:early","comp:brand"],"computed_at":"2026-10-25T05:49:26Z"},"pay":null,"html_url":"https://alion.io/job/intel-verification-engineer-ai-soc-development","json_url":"https://alion.io/job/intel-verification-engineer-ai-soc-development.json","meta":{"generated_at":"2026-10-25T16:46:26Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":24220,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-26T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":35},"rest":"https://alion.io/mcp/rest/get_company?id=35"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fintel-verification-engineer-ai-soc-development"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fintel-verification-engineer-ai-soc-development"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fintel-verification-engineer-ai-soc-development"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/intel-verification-engineer-ai-soc-development\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fintel-verification-engineer-ai-soc-development"}]}