{"id":2266075,"url":"https://alion.io/job/kandou-advanced-rd-analog-design-engineer-2","title":"Advanced R&D - Analog Design Engineer","company":{"id":3840688,"name":"Kandou","domain":"kandou.ai","url":"https://alion.io/company/kandou-2","size_band":"501-1000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Ashby","truth_index":null},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"senior","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"explicit","locations":["Saint-Sulpice, Switzerland"],"countries":["CH"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":117000,"max_usd":200000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":8},"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Virtuoso","optional":false},{"name":"Siemens Calibre","optional":false},{"name":"Synopsys HSPICE","optional":false}],"status":"live","first_seen_at":"2026-08-19T13:00:54Z","employer_posted_date":"2026-08-19","last_verified_at":"2026-10-21T08:10:04Z","board_verified":true,"closed_at":null,"days_open":62,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":62},"description":"At Kandou, we are redefining the economics of AI infrastructure. Our mission is to democratise AI by significantly reducing the Total Cost of Ownership (TCO) of hardware systems - a critical barrier to scalable adoption.\nOur proprietary MIMO-over-copper technology powers a high-performance, chiplet-based AI memory fabric that is both scalable and energy-efficient. Unlike traditional interconnects, our solution reduces power consumption significantly while preserving high bandwidth and ultra-low latency - unlocking unprecedented efficiency for AI training and inference at scale.\nKandou’s architecture is not just an incremental improvement - it’s a foundational shift in how AI hardware is built for the future.\nJob Title: Analog Design Engineer (Advanced Research and Development Department)\nJob Location: Switzerland\nKey responsibilities\nDevelop block level specifications and models for target designs\n\nDevelop, model, design, and verify performance of custom analog circuits in advanced technology nodes\n\nLayout design and development, including floor-planning, guiding layout engineers, and post-layout verification\n\nDesign verification at different levels (pre- and post-layout, variation-aware)\n\nSupport and collaborate with the design team, including other design and layout engineers, architects and chip level integration engineers, modeling and system level designers.\n\nSupport for post-silicon lab bring-up, debug, characterization and productization.\n\nProduce reports (progress report, analysis, design, modeling, and verification reports)\n\nParticipate in developing concept level architectures and circuits\n\nSkills\nDeep understanding on design and layout techniques for high-speed and high-precision circuits, problem solver, and excellent analytical skills.\n\nExperience in developing testbenches and simulation setups to analyze performance of target circuits and systems.\n\nSkillful in layout techniques, such as matching, parasitic estimation and reduction, and deep-submicron related issues.\n\nAdvanced user of EDA tool for design and verification, preferably Cadence Virtuoso, Spectre/HSpice, Calibre/PVS DRC/LVS, parasitic extraction and modelling, EM and IR drop tools, and ESD analysis, among others.\n\nSelf-motivated, with strong sense of ownership and responsibility.\n\nManage workload, schedules and report to internal management and technical teams.\n\nExcellent communication and reporting skills.\n\nExperience\n5+ years of experience in design and layout of analog and mixed-signal circuits, especially high-speed and high-precision circuits. Examples are: multi-gigabit serial data-link transceivers, RF circuits, equalizers, clock generators, PLLs, clock and data recovery circuits, data converters (ADC or DAC), biasing and bandgap circuits.\n\nMSc or PhD in electronics/electrical engineering (equivalent or higher).\n\nExperienced with modern semiconductor process technologies, such as CMOS 28nm, and FinFET 16/14nm, 7nm.\n\nExperienced in high-level modelling, top-level simulations, and signal integrity.\n\nSolid background on Signal Processing and Communications\n\nIf this is the role you have been looking for and you want to be part of a growing Company, with an exciting future then we would really love to hear from you. Together We Kandou It !","description_format":"text","description_chars":3272,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"master","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[{"name":"Switzerland","iso":"CH","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Memory & Storage Chips"],"lifecycle":[{"event":"open","at":"2026-10-11T06:33:18Z"}],"visa":[],"liveness":{"score":11,"band":"cold","label":"Long shot","p_open":1,"p_active":0.403,"p_room":0.28,"age_days":62,"expected_fill_days":12,"reasons":["conf:1","velocity","win:tail","crowd:"],"computed_at":"2026-10-21T05:46:15Z"},"pay":null,"html_url":"https://alion.io/job/kandou-advanced-rd-analog-design-engineer-2","json_url":"https://alion.io/job/kandou-advanced-rd-analog-design-engineer-2.json","meta":{"generated_at":"2026-10-21T08:12:17Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":11658,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-22T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":3840688},"rest":"https://alion.io/mcp/rest/get_company?id=3840688"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fkandou-advanced-rd-analog-design-engineer-2"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fkandou-advanced-rd-analog-design-engineer-2"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fkandou-advanced-rd-analog-design-engineer-2"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/kandou-advanced-rd-analog-design-engineer-2\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fkandou-advanced-rd-analog-design-engineer-2"}]}