{"id":2266064,"url":"https://alion.io/job/kandou-physical-design-engineers-2-openings","title":"Physical Design Engineers - 2 openings","company":{"id":3840688,"name":"Kandou","domain":"kandou.ai","url":"https://alion.io/company/kandou-2","size_band":"501-1000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Ashby","truth_index":null},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"middle","employment_type":"full_time","work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India","Hyderabad, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Genus","optional":false},{"name":"Siemens Calibre","optional":false},{"name":"Python","optional":true}],"status":"live","first_seen_at":"2026-08-19T13:07:56Z","employer_posted_date":"2026-08-19","last_verified_at":"2026-10-21T00:04:59Z","board_verified":true,"closed_at":null,"days_open":62,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":62},"description":"At Kandou, we are redefining the economics of AI infrastructure. Our mission is to democratise AI by significantly reducing the Total Cost of Ownership (TCO) of hardware systems - a critical barrier to scalable adoption.\nOur proprietary MIMO-over-copper technology powers a high-performance, chiplet-based AI memory fabric that is both scalable and energy-efficient. Unlike traditional interconnects, our solution reduces power consumption significantly while preserving high bandwidth and ultra-low latency - unlocking unprecedented efficiency for AI training and inference at scale.\nKandou’s architecture is not just an incremental improvement - it’s a foundational shift in how AI\nhardware is built for the future.\nWe are actively seeking Physical Design Engineers based in Hyderabad OR Bangalore\nRequired competences - Experience\n10+ years’ experience in the semiconductor industry, with min. 5 years in a digital Physical Design technical leadership role\n\nExperience on modern semiconductor process technologies including 28nm, 14/16nm, 7nm\n\nExperienced user of EDA tools for design and verification such as, Cadence Genus and Innovus, LEC, Calibre/PVS DRC/LVS, parasitics extraction, EM and IR drop, ESD, etc.\n\nExpertise in Timing Constraints and Static Timing Analysis (STA)\n\nExperience in CPF/UPF technologies and flows is highly desirable\n\nExposure to flip-chip package technologies and wire bond package technologies\n\nExperience in hierarchical floor planning and implementation\n\nExperience in release management and tape out procedures\n\nExperience in library setup and flow development with focus on cross project reusability\n\nExperience in DFT methodologies and implementation schemes\n\nRequired competences - Skills\nGood understanding of RTL to GDS implementation flow (synthesis, P&R, LEC, PV)\n\nSelf-motivated, with strong sense of ownership and responsibility. Good communicator and team player\n\nGood scripting capabilities (shell, TCL, Python, make) and good understanding of data management (revision control system)\n\nResponsibility and Authority\nAs a Physical Design Engineer, you will work closely with the Architecture, RTL, DFT teams to ensure first-time-right high-volume silicon production\n\nTiming constraints improvement and timing constraints validation, signoff Static Timing Analysis and block-level timing closure\n\nSynthesis, block level floor-planning, power grid design, place & route, clock tree synthesis, electromigration / IR-Drop analysis, power/signal integrity analysis, crosstalk analysis, formal equivalence checking and physical verification (DRC / LVS / Antenna)\n\nParticipate in developing improvements to scripts/methodologies/flows\n\nInteract closely with the design team to understand requirements and implement solutions as also helping on providing design views for use with digital PD flows (LIB, LEF, DEF, GDS, SPEF, etc.)\n\nSupport IP and chip level integration\n\nSupport and interact with customers on requirements and IP delivery\n\nManage workload and schedule and report to internal management team\n\nEducation\nBachelors/Masters of Engineering in Electronics and Electrical Engineering/Computer Science (equivalent or higher)\n\nhttps://www.kandou.ai/","description_format":"text","description_chars":3192,"description_truncated":false,"requirements":{"experience_years_min":10,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[{"name":"India","iso":"IN","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Memory & Storage Chips"],"lifecycle":[{"event":"open","at":"2026-10-11T06:33:18Z"}],"visa":[],"liveness":{"score":16,"band":"cold","label":"Long shot","p_open":1,"p_active":0.555,"p_room":0.28,"age_days":61,"expected_fill_days":30,"reasons":["conf:2","velocity","win:tail","crowd:"],"computed_at":"2026-10-20T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/kandou-physical-design-engineers-2-openings","json_url":"https://alion.io/job/kandou-physical-design-engineers-2-openings.json","meta":{"generated_at":"2026-10-21T01:15:22Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":1931,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-22T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":3840688},"rest":"https://alion.io/mcp/rest/get_company?id=3840688"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fkandou-physical-design-engineers-2-openings"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fkandou-physical-design-engineers-2-openings"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fkandou-physical-design-engineers-2-openings"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/kandou-physical-design-engineers-2-openings\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fkandou-physical-design-engineers-2-openings"}]}